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authorKenneth Chan <kenneth.chan@quanta.corp-partner.google.com>2021-09-24 17:15:24 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-09-27 13:28:16 +0000
commit401238873615141627cd06d61b57d63198619af2 (patch)
tree5984d20af163e18d2328ef78ca79cae237c578e3 /src/mainboard/google
parent81db2415eb563bdf4a72ef50b9a1b81a88bfe1c5 (diff)
mb/google/hatch/moonbuggy: Update DPTF parameters
Update the DPTF parameters received from the thermal team. BUG=b:188596619 TEST=emerge-ambassador coreboot Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> Change-Id: I081963b97ed2dae0f5d026f6443c954b52347a8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/57919 Reviewed-by: Joe Tessler <jrt@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/hatch/variants/moonbuggy/overridetree.cb31
1 files changed, 14 insertions, 17 deletions
diff --git a/src/mainboard/google/hatch/variants/moonbuggy/overridetree.cb b/src/mainboard/google/hatch/variants/moonbuggy/overridetree.cb
index 2554cfb1a6..dd83f4d475 100644
--- a/src/mainboard/google/hatch/variants/moonbuggy/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/moonbuggy/overridetree.cb
@@ -247,38 +247,35 @@ chip soc/intel/cannonlake
chip drivers/intel/dptf
## Active Policy
register "policies.active[0]" = "{.target=DPTF_CPU,
- .thresholds={TEMP_PCT(90, 85),
- TEMP_PCT(85, 75),
- TEMP_PCT(80, 65),
- TEMP_PCT(75, 55),
- TEMP_PCT(70, 45),}}"
+ .thresholds={TEMP_PCT(94, 0),}}"
register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
- .thresholds={TEMP_PCT(50, 85),
- TEMP_PCT(47, 75),
- TEMP_PCT(45, 65),
- TEMP_PCT(42, 55),
- TEMP_PCT(39, 45),}}"
+ .thresholds={TEMP_PCT(72, 90),
+ TEMP_PCT(68, 80),
+ TEMP_PCT(62, 70),
+ TEMP_PCT(54, 60),
+ TEMP_PCT(46, 50),
+ TEMP_PCT(39, 40),}}"
## Passive Policy
- register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
- register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)"
+ register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)"
+ register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 6000)"
## Critical Policy
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
- register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)"
+ register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN)"
## Power Limits Control
# PL1 is fixed at 15W, avg over 28-32s interval
- # 25-64W PL2 in 1000mW increments, avg over 28-32s interval
+ # 51-51W PL2 in 1000mW increments, avg over 28-32s interval
register "controls.power_limits.pl1" = "{
.min_power = 15000,
.max_power = 15000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
- .granularity = 200,}"
+ .granularity = 125,}"
register "controls.power_limits.pl2" = "{
- .min_power = 25000,
- .max_power = 64000,
+ .min_power = 51000,
+ .max_power = 51000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 1000,}"