mediatek/mt8173: Add a stub implementation of the MT8173 SoC

BUG=chrome-os-partner:36682
TEST=emerge-oak coreboot
BRANCH=none

Change-Id: I748752d5abca813a0469d3a76e4d40fcbeb9b959
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ece2f412d94f071a6f5f1dbed4dfaea504da9e1a
Original-Change-Id: I1dd5567a10d20840313703cfcd328bec591b4941
Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292558
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/12587
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

9 files changed, 256 insertions, 0 deletions

diff --git a/src/mainboard/google/oak/Kconfig b/src/mainboard/google/oak/Kconfig
new file mode 100644
index 0000000000..a7904caf12
--- /dev/null
+++ b/src/mainboard/google/oak/Kconfig
@@ -0,0 +1,49 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2015 MediaTek Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if BOARD_GOOGLE_OAK
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select SOC_MEDIATEK_MT8173
+	select CHROMEOS_VBNV_EC
+	select EC_GOOGLE_CHROMEEC
+	select EC_GOOGLE_CHROMEEC_SPI
+	select EC_SOFTWARE_SYNC
+	select MAINBOARD_HAS_NATIVE_VGA_INIT
+	select MAINBOARD_DO_NATIVE_VGA_INIT
+	select VIRTUAL_DEV_SWITCH
+
+config MAINBOARD_DIR
+	string
+	default google/oak
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "oak"
+
+config DRAM_SIZE_MB
+	int
+	default 2048
+
+config EC_GOOGLE_CHROMEEC_SPI_BUS
+	hex
+	default 0
+
+endif # BOARD_GOOGLE_OAK
diff --git a/src/mainboard/google/oak/Kconfig.name b/src/mainboard/google/oak/Kconfig.name
new file mode 100644
index 0000000000..49e27d7b6b
--- /dev/null
+++ b/src/mainboard/google/oak/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_GOOGLE_OAK
+	bool "Oak"
diff --git a/src/mainboard/google/oak/Makefile.inc b/src/mainboard/google/oak/Makefile.inc
new file mode 100644
index 0000000000..dbfc1dbb30
--- /dev/null
+++ b/src/mainboard/google/oak/Makefile.inc
@@ -0,0 +1,31 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2015 MediaTek Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+bootblock-y += bootblock.c
+bootblock-y += memlayout.ld
+bootblock-y += chromeos.c
+
+romstage-y += chromeos.c
+romstage-y += romstage.c
+romstage-y += memlayout.ld
+
+ramstage-y += mainboard.c
+ramstage-y += chromeos.c
+ramstage-y += memlayout.ld
+
diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c
new file mode 100644
index 0000000000..ddd71b3a84
--- /dev/null
+++ b/src/mainboard/google/oak/bootblock.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <bootblock_common.h>
+#include <delay.h>
+#include <soc/pericfg.h>
+
+void bootblock_mainboard_early_init(void)
+{
+	/* Clear UART0 power down signal */
+	clrbits_le32(&mt8173_pericfg->pdn0_set, PERICFG_UART0_PDN);
+}
+
+void bootblock_mainboard_init(void)
+{
+}
diff --git a/src/mainboard/google/oak/chromeos.c b/src/mainboard/google/oak/chromeos.c
new file mode 100644
index 0000000000..8d45a13ed2
--- /dev/null
+++ b/src/mainboard/google/oak/chromeos.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <boot/coreboot_tables.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+}
+
+int get_developer_mode_switch(void)
+{
+	return 0;
+}
+
+int get_recovery_mode_switch(void)
+{
+	return 0;
+}
+
+int get_write_protect_state(void)
+{
+	return 0;
+}
diff --git a/src/mainboard/google/oak/devicetree.cb b/src/mainboard/google/oak/devicetree.cb
new file mode 100644
index 0000000000..75045c68d0
--- /dev/null
+++ b/src/mainboard/google/oak/devicetree.cb
@@ -0,0 +1,24 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2015 MediaTek Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+chip soc/mediatek/mt8173
+	device cpu_cluster 0 on
+		device cpu 0 on end
+	end
+end
diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c
new file mode 100644
index 0000000000..6e0617e8b2
--- /dev/null
+++ b/src/mainboard/google/oak/mainboard.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/cache.h>
+#include <arch/io.h>
+#include <boardid.h>
+#include <boot/coreboot_tables.h>
+#include <device/device.h>
+
+static void mainboard_init(device_t dev)
+{
+}
+
+static void mainboard_enable(device_t dev)
+{
+	dev->ops->init = &mainboard_init;
+}
+
+struct chip_operations mainboard_ops = {
+	.name = "oak",
+	.enable_dev = mainboard_enable,
+};
diff --git a/src/mainboard/google/oak/memlayout.ld b/src/mainboard/google/oak/memlayout.ld
new file mode 100644
index 0000000000..ead7f47838
--- /dev/null
+++ b/src/mainboard/google/oak/memlayout.ld
@@ -0,0 +1 @@
+#include <soc/memlayout.ld>
diff --git a/src/mainboard/google/oak/romstage.c b/src/mainboard/google/oak/romstage.c
new file mode 100644
index 0000000000..268f15f5b6
--- /dev/null
+++ b/src/mainboard/google/oak/romstage.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <arch/cache.h>
+#include <arch/cpu.h>
+#include <arch/exception.h>
+#include <arch/io.h>
+
+#include <cbfs.h>
+#include <console/console.h>
+#include <delay.h>
+#include <program_loading.h>
+#include <romstage_handoff.h>
+#include <symbols.h>
+
+void main(void)
+{
+	/* init uart baudrate when pll on */
+	console_init();
+	exception_init();
+
+	run_ramstage();
+}