diff options
| author | Ronak Kanabar <ronak.kanabar@intel.com> | 2023-11-06 14:54:16 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-05-23 13:52:47 +0000 |
| commit | 3a5ed9b45a97025958ec0b5a859c6d4cd5b5a69c (patch) | |
| tree | da79b1002a35a4c0dc292c4a5c47e2cb4a34d997 /src/mainboard/google | |
| parent | c8b379bb7928a0e9c1e2dc42217e807c46a009e8 (diff) | |
mb/google/brya: Add romstage early graphics for nissa
1) Add all changes needed for early graphics
2) select MAINBOARD_USE_EARLY_LIBGFXINIT for nissa
The InnoLux (N156HCN-EBA C7) panel is used for the device tree.
BUG=b:296433986
TEST=On-screen text message seen during MRC training on Craask
Logs:
[NOTE ] MRC: no data in 'RW_MRC_CACHE'
[SPEW ] bootmode is set to: 0
[0.171409] DP PHY mode status not complete
[0.175509] DP PHY mode status not complete
[0.179799] DP PHY mode status not complete
[0.184087] DP PHY mode status not complete
[0.188376] DP PHY mode status not complete
[0.192665] DP PHY mode status not complete
[0.196954] DP PHY mode status not complete
[0.201243] DP PHY mode status not complete
[0.205532] DP PHY mode status not complete
[0.209821] DP PHY mode status not complete
[0.214110] DP PHY mode status not complete
[0.218397] DP PHY mode status not complete
[INFO ] Informing user on-display of memory training.
Change-Id: I33cfc5d1f8c25c344e598befd21c50a78a65275a
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78932
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
4 files changed, 46 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index d281a6feff..fcc2e63537 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -96,6 +96,7 @@ config BOARD_GOOGLE_BASEBOARD_NISSA select DRIVERS_AUDIO_SOF select DRIVERS_INTEL_ISH select MAINBOARD_DISABLE_STAGE_CACHE + select MAINBOARD_HAS_EARLY_LIBGFXINIT select MEMORY_SOLDERDOWN select SOC_INTEL_ALDERLAKE_PCH_N select SOC_INTEL_CSE_LITE_COMPRESS_ME_RW diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/Makefile.mk b/src/mainboard/google/brya/variants/baseboard/nissa/Makefile.mk index 3743228e8e..3a6695828f 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/Makefile.mk +++ b/src/mainboard/google/brya/variants/baseboard/nissa/Makefile.mk @@ -4,6 +4,7 @@ bootblock-y += gpio.c romstage-y += memory.c romstage-y += gpio.c +romstage-$(CONFIG_MAINBOARD_USE_EARLY_LIBGFXINIT) += gma-mainboard.ads ramstage-y += gpio.c ramstage-y += ramstage.c diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index 55bd9c0be2..495b5713da 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -155,7 +155,37 @@ chip soc/intel/alderlake }" device domain 0 on - device ref igpu on end + # The timing values can be derived from datasheet of display panel + # You can use EDID string to identify the type of display on the board + # use below command to get display info from EDID + # strings /sys/devices/pci0000:00/0000:00:02.0/drm/card0/card0-eDP-1/edid + + # refer to display PRM document (Volume 2b: Command Reference: Registers) + # for more info on display control registers + # https://01.org/linuxgraphics/documentation/hardware-specification-prms + #+-----------------------------+---------------------------------------+-----+ + #| Intel docs | devicetree.cb | eDP | + #+-----------------------------+---------------------------------------+-----+ + #| Power up delay | `gpu_panel_power_up_delay` | T3 | + #+-----------------------------+---------------------------------------+-----+ + #| Power on to backlight on | `gpu_panel_power_backlight_on_delay` | T7 | + #+-----------------------------+---------------------------------------+-----+ + #| Power Down delay | `gpu_panel_power_down_delay` | T10 | + #+-----------------------------+---------------------------------------+-----+ + #| Backlight off to power down | `gpu_panel_power_backlight_off_delay` | T9 | + #+-----------------------------+---------------------------------------+-----+ + #| Power Cycle Delay | `gpu_panel_power_cycle_delay` | T12 | + #+-----------------------------+---------------------------------------+-----+ + device ref igpu on + register "panel_cfg" = "{ + .up_delay_ms = 200, + .down_delay_ms = 50, + .cycle_delay_ms = 500, + .backlight_on_delay_ms = 1, + .backlight_off_delay_ms = 200, + .backlight_pwm_hz = 200, + }" + end device ref dtt on end device ref tcss_xhci on end device ref xhci on end diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/gma-mainboard.ads b/src/mainboard/google/brya/variants/baseboard/nissa/gma-mainboard.ads new file mode 100644 index 0000000000..3b02f14d95 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/nissa/gma-mainboard.ads @@ -0,0 +1,13 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + ports : constant Port_List := + (eDP, + others => Disabled); +end GMA.Mainboard; |