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authorVincent Palatin <vpalatin@chromium.org>2018-06-25 16:09:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-06 13:00:20 +0000
commit29b258ccc0053f8713f99827e7444a7bcec56f64 (patch)
treeab46e6872ea685781a749b14ca7b5c787091b98f /src/mainboard/google
parenta5a124c18829bc39f5d199fc7d5bdf5190f1f14c (diff)
mb/google/poppy/variants/nocturne: fix FPMCU IRQ sensitivity
the FPMCU_INT_L on GPP_C11 is active low but the kernel irq handler is defined as IRQF_TRIGGER_LOW, so do not invert it twice. BRANCH=poppy BUG=b:78613978 TEST=On Nocturne, the 'cros_ec' IRQ count in /proc/interrupts does not increment wildly. Change-Id: I56c13c797b133dd22669a2299bcd16ef14eed335 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://review.coreboot.org/27221 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/poppy/variants/nocturne/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c
index f6024799e9..481348768b 100644
--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c
+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c
@@ -135,7 +135,7 @@ static const struct pad_config gpio_table[] = {
/* C10 : UART0_RTS# ==> PCH_FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_C10, 0, DEEP),
/* C11 : UART0_CTS# ==> FPMCU_INT */
- PAD_CFG_GPI_APIC_INVERT(GPP_C11, NONE, DEEP),
+ PAD_CFG_GPI_APIC(GPP_C11, 20K_PU, DEEP),
/* C12 : UART1_RXD ==> PCH_MEM_CONFIG[0] */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP),
/* C13 : UART1_TXD ==> PCH_MEM_CONFIG[1] */