diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2013-03-21 11:51:41 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-22 00:00:09 +0100 |
commit | 24d1d4b47274eb82893e6726472a991a36fce0aa (patch) | |
tree | 57126316330f6f9d407f605fa831ce530650f069 /src/mainboard/google | |
parent | 55ed3106556a9bcbe36d3389dc5230d4a4ee2a40 (diff) |
x86: Unify arch/io.h and arch/romcc_io.h
Here's the great news: From now on you don't have to worry about
hitting the right io.h include anymore. Just forget about romcc_io.h
and use io.h instead. This cleanup has a number of advantages, like
you don't have to guard device/ includes for SMM and pre RAM
anymore. This allows to get rid of a number of ifdefs and will
generally make the code more readable and understandable.
Potentially in the future some of the code in the io.h __PRE_RAM__
path should move to device.h or other device/ includes instead,
but that's another incremental change.
Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2872
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/butterfly/chromeos.c | 4 | ||||
-rw-r--r-- | src/mainboard/google/butterfly/mainboard_smi.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/butterfly/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/link/chromeos.c | 4 | ||||
-rw-r--r-- | src/mainboard/google/link/mainboard_smi.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/link/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/parrot/chromeos.c | 5 | ||||
-rw-r--r-- | src/mainboard/google/parrot/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/parrot/smihandler.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/stout/chromeos.c | 4 | ||||
-rw-r--r-- | src/mainboard/google/stout/mainboard_smi.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/stout/romstage.c | 1 |
12 files changed, 0 insertions, 25 deletions
diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index 41abd95ca9..9821a2fa3a 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -21,12 +21,8 @@ #include <string.h> #include <vendorcode/google/chromeos/chromeos.h> #include <arch/io.h> -#ifdef __PRE_RAM__ -#include <arch/romcc_io.h> -#else #include <device/device.h> #include <device/pci.h> -#endif #include <southbridge/intel/bd82x6x/pch.h> #include <ec/quanta/ene_kb3940q/ec.h> diff --git a/src/mainboard/google/butterfly/mainboard_smi.c b/src/mainboard/google/butterfly/mainboard_smi.c index 4e02a3cd7f..e2f00e17c9 100644 --- a/src/mainboard/google/butterfly/mainboard_smi.c +++ b/src/mainboard/google/butterfly/mainboard_smi.c @@ -18,7 +18,6 @@ */ #include <arch/io.h> -#include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 13cd45427c..5e2b713a41 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -24,7 +24,6 @@ #include <timestamp.h> #include <arch/byteorder.h> #include <arch/io.h> -#include <arch/romcc_io.h> #include <device/pci_def.h> #include <device/pnp_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c index 04f68a9b1a..4ab5017f52 100644 --- a/src/mainboard/google/link/chromeos.c +++ b/src/mainboard/google/link/chromeos.c @@ -20,12 +20,8 @@ #include <string.h> #include <vendorcode/google/chromeos/chromeos.h> #include <arch/io.h> -#ifdef __PRE_RAM__ -#include <arch/romcc_io.h> -#else #include <device/device.h> #include <device/pci.h> -#endif #include <southbridge/intel/bd82x6x/pch.h> #include "ec.h" #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/link/mainboard_smi.c b/src/mainboard/google/link/mainboard_smi.c index 54cfb01f87..a4c4a50351 100644 --- a/src/mainboard/google/link/mainboard_smi.c +++ b/src/mainboard/google/link/mainboard_smi.c @@ -18,7 +18,6 @@ */ #include <arch/io.h> -#include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 689d2b52fa..f20a7226ab 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -24,7 +24,6 @@ #include <timestamp.h> #include <arch/byteorder.h> #include <arch/io.h> -#include <arch/romcc_io.h> #include <device/pci.h> #include <device/pci_def.h> #include <device/pnp_def.h> diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index d4054ef864..5e4549d52f 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -21,13 +21,8 @@ #include <string.h> #include <vendorcode/google/chromeos/chromeos.h> #include <arch/io.h> - -#ifdef __PRE_RAM__ -#include <arch/romcc_io.h> -#else #include <device/device.h> #include <device/pci.h> -#endif #include <southbridge/intel/bd82x6x/pch.h> #include <ec/compal/ene932/ec.h> diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index fc14b9b044..9968226f81 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -24,7 +24,6 @@ #include <timestamp.h> #include <arch/byteorder.h> #include <arch/io.h> -#include <arch/romcc_io.h> #include <device/pci_def.h> #include <device/pnp_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/google/parrot/smihandler.c b/src/mainboard/google/parrot/smihandler.c index 6f83fd8f00..a5f6ba2e3d 100644 --- a/src/mainboard/google/parrot/smihandler.c +++ b/src/mainboard/google/parrot/smihandler.c @@ -18,7 +18,6 @@ */ #include <arch/io.h> -#include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index db94cb7f47..8c8f3480ad 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -21,12 +21,8 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <arch/io.h> #include <console/console.h> -#ifdef __PRE_RAM__ -#include <arch/romcc_io.h> -#else #include <device/device.h> #include <device/pci.h> -#endif #include <southbridge/intel/bd82x6x/pch.h> #include "ec.h" diff --git a/src/mainboard/google/stout/mainboard_smi.c b/src/mainboard/google/stout/mainboard_smi.c index f6663de6f6..79810466c6 100644 --- a/src/mainboard/google/stout/mainboard_smi.c +++ b/src/mainboard/google/stout/mainboard_smi.c @@ -18,7 +18,6 @@ */ #include <arch/io.h> -#include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 2f4e1a7a76..14820ddc65 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -24,7 +24,6 @@ #include <timestamp.h> #include <arch/byteorder.h> #include <arch/io.h> -#include <arch/romcc_io.h> #include <device/pci_def.h> #include <device/pnp_def.h> #include <cpu/x86/lapic.h> |