diff options
| author | Julius Werner <jwerner@chromium.org> | 2014-05-30 18:01:44 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-04 00:15:17 +0100 |
| commit | 028cba9266e531d9d7c5e39432bbb7eeda6398ed (patch) | |
| tree | 20e7c32ea7fb9c1d676790a2b8f20f7a0bf45f03 /src/mainboard/google | |
| parent | 96ef1883a7a8b95f297f99fa7409f27c0f344d88 (diff) | |
ipq806x: Add USB support
This patch adds code to initialize the two DWC3 USB host controllers and
their associated PHYs to the IPQ806x SoC (closely imitating the existing
DWC3 implementation for Exynos5), and uses them to initialize USB on the
Storm mainboard.
BUG=chrome-os-partner:29375
TEST=Hack up netboot to get around missing SPI flash, load a file over
TFTP. Hack a storage read into the storage attach function, dump the
data and confirm that it looks right. Enable USB debugging and confirm
3.0 devices get enumerated at SuperSpeed (mostly).
Original-Change-Id: Iaf7b96bef994081ca222b7de9d8e8c49751d3f1d
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/202157
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
(cherry picked from commit 6349e7281d5accb1247acb0537a48fa3a5e1bf97)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I749d265d45c6a807a7559bd4df2490a6eb8067af
Reviewed-on: http://review.coreboot.org/8056
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/storm/Kconfig | 8 | ||||
| -rw-r--r-- | src/mainboard/google/storm/mainboard.c | 33 |
2 files changed, 34 insertions, 7 deletions
diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig index 4c90c4e094..1063f83ddd 100644 --- a/src/mainboard/google/storm/Kconfig +++ b/src/mainboard/google/storm/Kconfig @@ -40,4 +40,12 @@ config DRAM_SIZE_MB int default 512 +config DRAM_DMA_START + hex + default 0x5a000000 + +config DRAM_DMA_SIZE + hex + default 0x00200000 + endif # BOARD_GOOGLE_STORM diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c index 1e622f4904..301e6450e5 100644 --- a/src/mainboard/google/storm/mainboard.c +++ b/src/mainboard/google/storm/mainboard.c @@ -20,17 +20,25 @@ #include <arch/cache.h> #include <boot/coreboot_tables.h> #include <device/device.h> - -#define TO_MB(x) ((x)>>20) +#include <soc/qualcomm/ipq806x/include/clock.h> +#include <soc/qualcomm/ipq806x/include/usb.h> /* convenient shorthand (in MB) */ -#define DRAM_START TO_MB(CONFIG_SYS_SDRAM_BASE) +#define DRAM_START (CONFIG_SYS_SDRAM_BASE / MiB) #define DRAM_SIZE (CONFIG_DRAM_SIZE_MB) #define DRAM_END (DRAM_START + DRAM_SIZE) /* DMA memory for drivers */ -#define DMA_START TO_MB(CONFIG_DRAM_DMA_START) -#define DMA_SIZE TO_MB(CONFIG_DRAM_DMA_SIZE) +#define DMA_START (CONFIG_DRAM_DMA_START / MiB) +#define DMA_SIZE (CONFIG_DRAM_DMA_SIZE / MiB) + +static void setup_usb(void) +{ + usb_clock_config(); + + setup_usb_host1(); + setup_usb_host2(); +} static void setup_mmu(void) { @@ -43,8 +51,7 @@ static void setup_mmu(void) /* Map DRAM memory */ mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); /* Map DMA memory */ - if (DMA_SIZE) - mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF); + mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF); mmu_disable_range(DRAM_END, 4096 - DRAM_END); @@ -56,6 +63,7 @@ static void setup_mmu(void) static void mainboard_init(device_t dev) { setup_mmu(); + setup_usb(); } static void mainboard_enable(device_t dev) @@ -67,3 +75,14 @@ struct chip_operations mainboard_ops = { .name = "storm", .enable_dev = mainboard_enable, }; + +void lb_board(struct lb_header *header) +{ + struct lb_range *dma; + + dma = (struct lb_range *)lb_new_record(header); + dma->tag = LB_TAB_DMA; + dma->size = sizeof(*dma); + dma->range_start = CONFIG_DRAM_DMA_START; + dma->range_size = CONFIG_DRAM_DMA_SIZE; +} |