diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-08-24 14:58:12 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-25 22:50:17 +0200 |
| commit | f7ce40baf6a26e70ca18026f26977cd7f6f2cefa (patch) | |
| tree | e8b942f64f1a45e96f8406e70c958f8b561dec2e /src/mainboard/google | |
| parent | 70385968cea517ed20dc3f3f665d92096acc768c (diff) | |
vboot: consolidate google_chromeec_early_init() calls
On x86 platforms, google_chromeec_early_init() is used to put the EC
into RO mode when there's a recovery request. This is to avoid training
memory multiple times when the recovery request is through an EC host
event while the EC is running RW code. Under that condition the EC will
be reset (along with the rest of the system) when the kernel verification
happens. This leads to an execessively long recovery path because of the
double reboot performing full memory training each time.
By putting this logic into the verstage program this reduces the
bootblock size on the skylake boards. Additionally, this provides the
the correct logic for all future boards since it's not tied to FSP
nor the mainboard itself. Lastly, this double memory training protection
works only for platforms which verify starting from bootblock. The
platforms which don't start verifying until after romstage need to
have their own calls (such as haswell and baytrail).
Change-Id: Ia8385dfc136b09fb20bd3519f3cc621e540b11a5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16318
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/chell/bootblock_mainboard.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/glados/bootblock_mainboard.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/lars/bootblock_mainboard.c | 4 |
3 files changed, 0 insertions, 12 deletions
diff --git a/src/mainboard/google/chell/bootblock_mainboard.c b/src/mainboard/google/chell/bootblock_mainboard.c index d514622442..627b4e8b08 100644 --- a/src/mainboard/google/chell/bootblock_mainboard.c +++ b/src/mainboard/google/chell/bootblock_mainboard.c @@ -14,7 +14,6 @@ */ #include <bootblock_common.h> -#include <ec/google/chromeec/ec.h> #include <soc/gpio.h> #include "gpio.h" @@ -28,8 +27,5 @@ static void early_config_gpio(void) void bootblock_mainboard_init(void) { - /* Ensure the EC and PD are in the right mode for recovery */ - google_chromeec_early_init(); - early_config_gpio(); } diff --git a/src/mainboard/google/glados/bootblock_mainboard.c b/src/mainboard/google/glados/bootblock_mainboard.c index d514622442..627b4e8b08 100644 --- a/src/mainboard/google/glados/bootblock_mainboard.c +++ b/src/mainboard/google/glados/bootblock_mainboard.c @@ -14,7 +14,6 @@ */ #include <bootblock_common.h> -#include <ec/google/chromeec/ec.h> #include <soc/gpio.h> #include "gpio.h" @@ -28,8 +27,5 @@ static void early_config_gpio(void) void bootblock_mainboard_init(void) { - /* Ensure the EC and PD are in the right mode for recovery */ - google_chromeec_early_init(); - early_config_gpio(); } diff --git a/src/mainboard/google/lars/bootblock_mainboard.c b/src/mainboard/google/lars/bootblock_mainboard.c index d514622442..627b4e8b08 100644 --- a/src/mainboard/google/lars/bootblock_mainboard.c +++ b/src/mainboard/google/lars/bootblock_mainboard.c @@ -14,7 +14,6 @@ */ #include <bootblock_common.h> -#include <ec/google/chromeec/ec.h> #include <soc/gpio.h> #include "gpio.h" @@ -28,8 +27,5 @@ static void early_config_gpio(void) void bootblock_mainboard_init(void) { - /* Ensure the EC and PD are in the right mode for recovery */ - google_chromeec_early_init(); - early_config_gpio(); } |