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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-09 12:37:25 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-01-26 00:17:38 +0000
commit9e591c409a3e3264f54a3784b0891a7f27dd52d8 (patch)
tree80f2cbf10a4e5fff5030ee0d4704a6cc019af01c /src/mainboard/google
parentf9acd37d7f15290240d4fb9e365a7b79af57b925 (diff)
soc/amd: Refactor some ACPI S3 calls
Do not pass ACPI S3 state as a parameter, by locally calling acpi_is_wakeup_s3() compiler has better chance for optimizing HAVE_ACPI_RESUME=n case. Test for acpi_s3_allowed() is already included in the implementation of acpi_is_wakeup_s3() and is removed as redunandant. For ramstage, acpi_is_wakeup_s3() evaluates to romstage_handoff_if_resume(). Change-Id: I6c1e00ec3d5be9a47b9d911c73965bc0c2b17624 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49838 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/kahlee/romstage.c8
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h2
-rw-r--r--src/mainboard/google/kahlee/variants/careena/variant.c5
3 files changed, 8 insertions, 7 deletions
diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c
index 389834cd77..41a7e460df 100644
--- a/src/mainboard/google/kahlee/romstage.c
+++ b/src/mainboard/google/kahlee/romstage.c
@@ -1,21 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/dimm_spd.h>
+#include <arch/romstage.h>
#include <baseboard/variants.h>
#include <soc/gpio.h>
-#include <soc/romstage.h>
int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len)
{
return variant_mainboard_read_spd(spdAddress, buf, len);
}
-void __weak variant_romstage_entry(int s3_resume)
+void __weak variant_romstage_entry(void)
{
/* By default, don't do anything */
}
-void mainboard_romstage_entry_s3(int s3_resume)
+void mainboard_romstage_entry(void)
{
size_t num_gpios;
const struct soc_amd_gpio *gpios;
@@ -23,5 +23,5 @@ void mainboard_romstage_entry_s3(int s3_resume)
gpios = variant_romstage_gpio_table(&num_gpios);
program_gpios(gpios, num_gpios);
- variant_romstage_entry(s3_resume);
+ variant_romstage_entry();
}
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
index a55e7a304d..f4f91ae0b3 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
@@ -17,7 +17,7 @@ const struct soc_amd_gpio *variant_early_gpio_table(size_t *size);
const struct soc_amd_gpio *variant_wlan_rst_early_gpio_table(size_t *size);
const struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size);
const struct soc_amd_gpio *variant_gpio_table(size_t *size);
-void variant_romstage_entry(int s3_resume);
+void variant_romstage_entry(void);
void variant_mainboard_suspend_resume(void);
#endif /* __BASEBOARD_VARIANTS_H__ */
diff --git a/src/mainboard/google/kahlee/variants/careena/variant.c b/src/mainboard/google/kahlee/variants/careena/variant.c
index d767124c2e..33ad260e74 100644
--- a/src/mainboard/google/kahlee/variants/careena/variant.c
+++ b/src/mainboard/google/kahlee/variants/careena/variant.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <acpi/acpi.h>
#include <ec/google/chromeec/ec.h>
#include <baseboard/variants.h>
#include <variant/sku.h>
@@ -17,12 +18,12 @@ const struct soc_amd_gpio *variant_wlan_rst_early_gpio_table(size_t *size)
return variant_gpio_wlan_rst_early_reset;
}
-void variant_romstage_entry(int s3_resume)
+void variant_romstage_entry(void)
{
uint32_t sku = google_chromeec_get_sku_id();
uint32_t bid;
- if (!s3_resume) {
+ if (!acpi_is_wakeup_s3()) {
/* Based on SKU, turn on keyboard backlight */
switch (sku) {
default: