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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-02-11 17:31:25 +0200
committerMartin Roth <martinroth@google.com>2017-02-23 18:36:24 +0100
commit57d4c30e22b5f35f9103240aa731798a21fe5a24 (patch)
tree862bf21c9ff1fa975fa7ad0d6db14339266de11a /src/mainboard/google
parenta5c029f235d07707f2d6d9600c0ea3af55c88b81 (diff)
lynxpoint bd82x6x: Enable PCI-to-PCI bridge
Once the PCI command register is written the bridge forwards future IO and memory regions, as programmed in the respective base and limit registers, to the secondary PCI bus. It was previously argumented this is copy-paste and never known to be required for these more recent platforms: https://review.coreboot.org/#/c/2706/ Change-Id: Ic8911500a30bc83587af8d4b393b66783fa52e18 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18330 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google')
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