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authorKeith Short <keithshort@chromium.org>2019-02-05 16:15:10 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-02-13 13:03:33 +0000
commite0f340054761086e4c329a2f66bb8f5b6e13d7c9 (patch)
tree977ba95155edd474d6d67c4bf61f58ee869c094f /src/mainboard/google
parent91be00ef1be29e6670599aa5e9c297854a928d07 (diff)
coreboot: check Cr50 PM mode on normal boot
Under some scenarios the key ladder on the Cr50 can get disabled. If this state is detected, trigger a reboot of the Cr50 to restore full TPM functionality. BUG=b:121463033 BRANCH=none TEST=Built coreboot on sarien and grunt platforms. TEST=Ran 'gsctool -a -m disable' and reboot. Verified coreboot sends VENDOR_CC_IMMEDIATE_RESET command to Cr50 and that the Cr50 resets and then the platform boots normally. TEST=Performed Cr50 rollback to 0.0.22 which does not support the VENDOR_CC_TPM_MODE command, confirmed that platform boots normally and the coreboot log captures the unsupported command. Tested-by: Keith Short <keithshort@chromium.org> Change-Id: I70e012efaf1079d43890e909bc6b5015bef6835a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://review.coreboot.org/c/31260 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/sarien/chromeos.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/sarien/chromeos.c b/src/mainboard/google/sarien/chromeos.c
index 4cd6e16a95..1e363fdfdd 100644
--- a/src/mainboard/google/sarien/chromeos.c
+++ b/src/mainboard/google/sarien/chromeos.c
@@ -115,7 +115,7 @@ int get_lid_switch(void)
return 1;
}
-void mainboard_cr50_update_reset(void)
+void mainboard_prepare_cr50_reset(void)
{
#if ENV_RAMSTAGE
/* Ensure system powers up after CR50 reset */