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authorPeter Lemenkov <lemenkov@gmail.com>2019-06-15 21:39:32 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-07-18 13:48:43 +0000
commit6752b61514609efd55e7d248b7c3c7127ee43693 (patch)
tree7ceaae627f48f4fdc679ff64694d5165f97fc810 /src/mainboard/google
parent915327136858d5412c9c02bf0730578e87101d59 (diff)
mb/*/*/gpio: Use static for const structures
Autoport generates these structures as static so let's make it consistent. See also commit 128205fd with Change-Id I83382d38a4a3b7ed11b8e7077cc5fbe154e261a7 ("autoport/bd82x6x.go: Improve gpio.c generation"). Change-Id: I4e07bd755ca4a65b76c69625d235a879fe7b43cb Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33524 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/butterfly/gpio.c20
-rw-r--r--src/mainboard/google/link/gpio.c20
-rw-r--r--src/mainboard/google/parrot/gpio.c20
-rw-r--r--src/mainboard/google/stout/gpio.c20
4 files changed, 40 insertions, 40 deletions
diff --git a/src/mainboard/google/butterfly/gpio.c b/src/mainboard/google/butterfly/gpio.c
index 2d14699ef6..2630177cf1 100644
--- a/src/mainboard/google/butterfly/gpio.c
+++ b/src/mainboard/google/butterfly/gpio.c
@@ -15,7 +15,7 @@
#include <southbridge/intel/common/gpio.h>
-const struct pch_gpio_set1 pch_gpio_set1_mode = {
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio0 = GPIO_MODE_NONE, /* Unused */
.gpio1 = GPIO_MODE_NONE, /* Unused */
.gpio2 = GPIO_MODE_NONE, /* Unused */
@@ -50,7 +50,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio31 = GPIO_MODE_NONE, /* Unused */
};
-const struct pch_gpio_set1 pch_gpio_set1_direction = {
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio0 = GPIO_DIR_INPUT, /* Unused */
.gpio1 = GPIO_DIR_INPUT, /* Unused */
.gpio2 = GPIO_DIR_INPUT, /* Unused */
@@ -85,7 +85,7 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio31 = GPIO_DIR_INPUT, /* Unused */
};
-const struct pch_gpio_set1 pch_gpio_set1_level = {
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio0 = GPIO_LEVEL_LOW, /* Unused */
.gpio1 = GPIO_LEVEL_LOW, /* Unused */
.gpio2 = GPIO_LEVEL_LOW, /* Unused */
@@ -120,12 +120,12 @@ const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio31 = GPIO_LEVEL_LOW, /* Unused */
};
-const struct pch_gpio_set1 pch_gpio_set1_invert = {
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
.gpio11 = GPIO_INVERT, /* invert touchpad wakeup pin */
.gpio13 = GPIO_INVERT, /* invert EC SCI pin */
};
-const struct pch_gpio_set2 pch_gpio_set2_mode = {
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio32 = GPIO_MODE_NATIVE, /* Native - Connect to EC Clock Run */
.gpio33 = GPIO_MODE_GPIO, /* Input - (Google protect BIOS ROM) */
.gpio34 = GPIO_MODE_NONE, /* Unused */
@@ -160,7 +160,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio63 = GPIO_MODE_NATIVE, /* Native - SLP_S5 */
};
-const struct pch_gpio_set2 pch_gpio_set2_direction = {
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio32 = GPIO_DIR_INPUT, /* Native */
.gpio33 = GPIO_DIR_INPUT, /* Input */
.gpio34 = GPIO_DIR_INPUT, /* Unused */
@@ -195,7 +195,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio63 = GPIO_DIR_INPUT, /* Native */
};
-const struct pch_gpio_set2 pch_gpio_set2_level = {
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio32 = GPIO_LEVEL_LOW, /* Native */
.gpio33 = GPIO_LEVEL_LOW, /* Input */
.gpio34 = GPIO_LEVEL_LOW, /* Unused */
@@ -230,7 +230,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio63 = GPIO_LEVEL_LOW, /* Native */
};
-const struct pch_gpio_set3 pch_gpio_set3_mode = {
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio64 = GPIO_MODE_NONE, /* Unused */
.gpio65 = GPIO_MODE_NONE, /* Unused */
.gpio66 = GPIO_MODE_NONE, /* Unused */
@@ -245,7 +245,7 @@ const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio75 = GPIO_MODE_GPIO, /* Input - SMB_ME1_DAT */
};
-const struct pch_gpio_set3 pch_gpio_set3_direction = {
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio64 = GPIO_DIR_INPUT, /* Unused */
.gpio65 = GPIO_DIR_INPUT, /* Unused */
.gpio66 = GPIO_DIR_INPUT, /* Unused */
@@ -260,7 +260,7 @@ const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio75 = GPIO_DIR_INPUT, /* Input */
};
-const struct pch_gpio_set3 pch_gpio_set3_level = {
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
.gpio64 = GPIO_LEVEL_LOW, /* Unused */
.gpio65 = GPIO_LEVEL_LOW, /* Unused */
.gpio66 = GPIO_LEVEL_LOW, /* Unused */
diff --git a/src/mainboard/google/link/gpio.c b/src/mainboard/google/link/gpio.c
index dcd29a33c6..035cf6da3f 100644
--- a/src/mainboard/google/link/gpio.c
+++ b/src/mainboard/google/link/gpio.c
@@ -18,7 +18,7 @@
#include <southbridge/intel/common/gpio.h>
-const struct pch_gpio_set1 pch_gpio_set1_mode = {
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio0 = GPIO_MODE_GPIO, /* NMI_DBG# */
.gpio3 = GPIO_MODE_GPIO, /* ALS_INT# */
.gpio5 = GPIO_MODE_GPIO, /* SIM_DET */
@@ -35,7 +35,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio28 = GPIO_MODE_GPIO, /* SLP_ME_CSW_DEV# */
};
-const struct pch_gpio_set1 pch_gpio_set1_direction = {
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio0 = GPIO_DIR_INPUT,
.gpio3 = GPIO_DIR_INPUT,
.gpio5 = GPIO_DIR_INPUT,
@@ -52,13 +52,13 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio28 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set1 pch_gpio_set1_level = {
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio1 = GPIO_LEVEL_HIGH,
.gpio6 = GPIO_LEVEL_HIGH,
.gpio24 = GPIO_LEVEL_LOW,
};
-const struct pch_gpio_set1 pch_gpio_set1_invert = {
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
.gpio7 = GPIO_INVERT,
.gpio8 = GPIO_INVERT,
.gpio12 = GPIO_INVERT,
@@ -66,7 +66,7 @@ const struct pch_gpio_set1 pch_gpio_set1_invert = {
.gpio15 = GPIO_INVERT,
};
-const struct pch_gpio_set2 pch_gpio_set2_mode = {
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio36 = GPIO_MODE_GPIO, /* W_DISABLE_L */
.gpio41 = GPIO_MODE_GPIO, /* SPD vector D0 */
.gpio42 = GPIO_MODE_GPIO, /* SPD vector D1 */
@@ -75,7 +75,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio60 = GPIO_MODE_GPIO, /* DRAMRST_CNTRL_PCH */
};
-const struct pch_gpio_set2 pch_gpio_set2_direction = {
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio36 = GPIO_DIR_OUTPUT,
.gpio41 = GPIO_DIR_INPUT,
.gpio42 = GPIO_DIR_INPUT,
@@ -84,18 +84,18 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio60 = GPIO_DIR_OUTPUT,
};
-const struct pch_gpio_set2 pch_gpio_set2_level = {
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio36 = GPIO_LEVEL_HIGH,
.gpio60 = GPIO_LEVEL_HIGH,
};
-const struct pch_gpio_set3 pch_gpio_set3_mode = {
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
};
-const struct pch_gpio_set3 pch_gpio_set3_direction = {
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
};
-const struct pch_gpio_set3 pch_gpio_set3_level = {
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
};
const struct pch_gpio_map mainboard_gpio_map = {
diff --git a/src/mainboard/google/parrot/gpio.c b/src/mainboard/google/parrot/gpio.c
index 8ad18f1f51..359b6ecc6d 100644
--- a/src/mainboard/google/parrot/gpio.c
+++ b/src/mainboard/google/parrot/gpio.c
@@ -18,7 +18,7 @@
#include <southbridge/intel/common/gpio.h>
-const struct pch_gpio_set1 pch_gpio_set1_mode = {
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio0 = GPIO_MODE_NONE, /* NOT USED */
.gpio1 = GPIO_MODE_NONE, /* NOT USED */
.gpio2 = GPIO_MODE_NATIVE, /* NOT USED / PIRQE# */
@@ -53,7 +53,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio31 = GPIO_MODE_NATIVE, /* ACPRESENT */
};
-const struct pch_gpio_set1 pch_gpio_set1_direction = {
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio0 = GPIO_DIR_INPUT,
.gpio1 = GPIO_DIR_INPUT,
.gpio2 = GPIO_DIR_INPUT,
@@ -88,7 +88,7 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio31 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set1 pch_gpio_set1_level = {
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio0 = GPIO_LEVEL_LOW,
.gpio1 = GPIO_LEVEL_LOW,
.gpio2 = GPIO_LEVEL_LOW,
@@ -123,14 +123,14 @@ const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio31 = GPIO_LEVEL_LOW,
};
-const struct pch_gpio_set1 pch_gpio_set1_invert = {
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
.gpio7 = GPIO_INVERT,
.gpio8 = GPIO_INVERT,
.gpio12 = GPIO_INVERT,
.gpio15 = GPIO_INVERT,
};
-const struct pch_gpio_set2 pch_gpio_set2_mode = {
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio36 = GPIO_MODE_GPIO, /* W_DISABLE_L */
.gpio41 = GPIO_MODE_GPIO, /* SPD vector D0 */
.gpio42 = GPIO_MODE_GPIO, /* SPD vector D1 */
@@ -139,7 +139,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio60 = GPIO_MODE_GPIO, /* DRAMRST_CNTRL_PCH */
};
-const struct pch_gpio_set2 pch_gpio_set2_direction = {
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio32 = GPIO_DIR_INPUT,
.gpio33 = GPIO_DIR_INPUT,
.gpio34 = GPIO_DIR_INPUT,
@@ -174,7 +174,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio63 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set2 pch_gpio_set2_level = {
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio32 = GPIO_LEVEL_LOW,
.gpio33 = GPIO_LEVEL_LOW,
.gpio34 = GPIO_LEVEL_LOW,
@@ -209,7 +209,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio63 = GPIO_LEVEL_LOW,
};
-const struct pch_gpio_set3 pch_gpio_set3_mode = {
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio64 = GPIO_MODE_NONE, /* NOT USED / CLK_FLEX0 */
.gpio65 = GPIO_MODE_NONE, /* NOT USED / CLK_FLEX1 */
.gpio66 = GPIO_MODE_NONE, /* NOT USED / CLK_FLEX2 */
@@ -224,7 +224,7 @@ const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio75 = GPIO_MODE_NATIVE, /* SML1DATA */
};
-const struct pch_gpio_set3 pch_gpio_set3_direction = {
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio64 = GPIO_DIR_INPUT,
.gpio65 = GPIO_DIR_INPUT,
.gpio66 = GPIO_DIR_INPUT,
@@ -239,7 +239,7 @@ const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio75 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set3 pch_gpio_set3_level = {
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
.gpio64 = GPIO_LEVEL_LOW,
.gpio65 = GPIO_LEVEL_LOW,
.gpio66 = GPIO_LEVEL_LOW,
diff --git a/src/mainboard/google/stout/gpio.c b/src/mainboard/google/stout/gpio.c
index 43134ea264..014037e4b9 100644
--- a/src/mainboard/google/stout/gpio.c
+++ b/src/mainboard/google/stout/gpio.c
@@ -18,7 +18,7 @@
#include <southbridge/intel/common/gpio.h>
-const struct pch_gpio_set1 pch_gpio_set1_mode = {
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio0 = GPIO_MODE_GPIO, /* GPIO0 */
.gpio1 = GPIO_MODE_GPIO, /* SIO_EXT_SMI# */
.gpio2 = GPIO_MODE_NONE, /* NOT USED */
@@ -53,7 +53,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio31 = GPIO_MODE_NATIVE, /* AC_PRESENT */
};
-const struct pch_gpio_set1 pch_gpio_set1_direction = {
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
/*
* Note: Only gpio configured as "gpio" or "none" need to have the
* direction configured.
@@ -86,7 +86,7 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio29 = GPIO_DIR_OUTPUT,
};
-const struct pch_gpio_set1 pch_gpio_set1_level = {
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
/*
* Note: Only gpio configured as "gpio" or "none" need to have the
* level set.
@@ -119,13 +119,13 @@ const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio29 = GPIO_LEVEL_HIGH,
};
-const struct pch_gpio_set1 pch_gpio_set1_invert = {
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
.gpio1 = GPIO_INVERT,
.gpio6 = GPIO_INVERT,
.gpio8 = GPIO_INVERT,
};
-const struct pch_gpio_set2 pch_gpio_set2_mode = {
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio32 = GPIO_MODE_NATIVE, /* PCI_CLKRUN# */
.gpio33 = GPIO_MODE_GPIO, /* GPIO33 */
.gpio34 = GPIO_MODE_GPIO, /* CCD_ON */
@@ -160,7 +160,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio63 = GPIO_MODE_NATIVE, /* TP51 */
};
-const struct pch_gpio_set2 pch_gpio_set2_direction = {
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
/*
* Note: Only gpio configured as "gpio" or "none" need to have the
* direction configured.
@@ -190,7 +190,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio61 = GPIO_DIR_OUTPUT,
};
-const struct pch_gpio_set2 pch_gpio_set2_level = {
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
/*
* Note: Only gpio configured as "gpio" or "none" need to have the
* level set.
@@ -220,7 +220,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio61 = GPIO_LEVEL_LOW,
};
-const struct pch_gpio_set3 pch_gpio_set3_mode = {
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio64 = GPIO_MODE_GPIO, /* CLK_FLEX0 / TP38 */
.gpio65 = GPIO_MODE_GPIO, /* CLK_FLEX1 / TP45 */
.gpio66 = GPIO_MODE_GPIO, /* CLK_FLEX2 / TP83 */
@@ -235,7 +235,7 @@ const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio75 = GPIO_MODE_NATIVE, /* SMB_ME1_DAT */
};
-const struct pch_gpio_set3 pch_gpio_set3_direction = {
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
/*
* Note: Only gpio configured as "gpio" or "none" need to have the
* direction configured.
@@ -251,7 +251,7 @@ const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio72 = GPIO_DIR_OUTPUT,
};
-const struct pch_gpio_set3 pch_gpio_set3_level = {
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
/*
* Note: Only gpio configured as "gpio" or "none" need to have the
* level set.