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authorDuncan Laurie <dlaurie@chromium.org>2015-09-23 17:53:31 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-09-28 09:34:52 +0000
commit4a399c2bae3695708a931146a4aab92b56491561 (patch)
tree92c9989e69c85e49ccbf026ca4d211c15067d5d9 /src/mainboard/google
parent36ad827b68f4f0659339742e0c1ac0bb5fcee753 (diff)
skylake: ACPI: Remove Configurable TDP support code
Remove the CTDP support code that is in ACPI. It has been ported from haswell and while the MCHBAR register interface does seem to still exist the calculations for determining PL2 is no longer straightforward. Additionally nothing is using this interface and the expectation is that DPTF will be used for throttling with PL[1234] and having ACPI interfere with the configuration would not be good. BUG=chrome-os-partner:44622 BRANCH=none TEST=emerge-glados coreboot Change-Id: I81e356ddf564a5253458b82bc3327bfb573ab16d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 884ee9a764bad0b3b4bcaeb5a3f46c5f090a116c Original-Change-Id: I284ab52a305cee25c88df5228b01ff1e9544efe3 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/302166 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11719 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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