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authorKangheui Won <khwon@chromium.org>2019-12-19 13:24:29 -0800
committerEdward O'Callaghan <quasisec@chromium.org>2019-12-20 13:33:17 +0000
commit40a1f70bb0c844f20ae2201a32264a4d6a791668 (patch)
tree71bb85d43f8704fb9650587f7883171bc8002b3e /src/mainboard/google
parentb61f33cd484ece8c86acdce2740d0ab4018f3f30 (diff)
mainboard/google/puff: Add extra USB configuration
Adding extra USB configuration since Puff has different USB ports compared to hatch BRANCH=none BUG=b:146437609 TEST=none Change-Id: I42ef6b6b718274953711c84ebe90971f108501fa Signed-off-by: Kangheui Won <khwon@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37853 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/hatch/variants/puff/overridetree.cb34
1 files changed, 34 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb
index d362b22770..a24d7fc80a 100644
--- a/src/mainboard/google/hatch/variants/puff/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb
@@ -15,6 +15,11 @@ chip soc/intel/cannonlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled,
}"
+ # USB configuration
+ register "usb2_ports[4]" = "USB2_PORT_SHORT(OC_SKIP)"
+ register "usb2_ports[6]" = "USB2_PORT_EMPTY"
+ register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)"
+
# Enable eMMC HS400
register "ScsEmmcHs400Enabled" = "1"
@@ -114,6 +119,35 @@ chip soc/intel/cannonlake
register "sdcard_cd_gpio" = "vSD3_CD_B"
device domain 0 on
+ device pci 14.0 on
+ chip drivers/usb/acpi
+ device usb 0.0 on
+ chip drivers/usb/acpi
+ register "desc" = ""Type-A Port 4""
+ register "type" = "UPC_TYPE_A"
+ device usb 2.4 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Type-A Port 0""
+ register "type" = "UPC_TYPE_A"
+ device usb 2.5 on end
+ end
+ chip drivers/usb/acpi
+ device usb 2.6 off end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Type-A Port 0""
+ register "type" = "UPC_TYPE_USB3_A"
+ device usb 3.4 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Type-A Port 4""
+ register "type" = "UPC_TYPE_USB3_A"
+ device usb 3.5 on end
+ end
+ end
+ end
+ end # USB xHCI
device pci 15.0 off
# RFU - Reserved for Future Use.
end # I2C #0