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authorRonald G. Minnich <rminnich@gmail.com>2013-01-30 15:55:36 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-01 06:17:41 +0100
commit0a5bc7fb474a15b77747b2007340dd7589413d8d (patch)
tree47a8db0641411ddb75d94a4d41bdc6e4be11b01a /src/mainboard/google
parentc9f26a169d854cf682f3d9d55124dce70b84620f (diff)
snow: make romstage init DRAM controller and call ramstage
This is a first cut at a romstage. It sets up memory, although that needs some work; and finds and loads a ramstage. Change-Id: I02a0eb48828500bf83c3c57d4bacb396e58bf9a5 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2245 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/snow/romstage.c89
1 files changed, 72 insertions, 17 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index 3f3f3ec38a..fae371a3de 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -19,35 +19,90 @@
#include <types.h>
#include <system.h>
-#include <cache.h>
-
-#if 0
-#include <arch/io.h>
-/* FIXME: make i2c.h use standard types */
-#define uchar unsigned char
-#define uint unsigned int
-#include <device/i2c.h>
+#include <cache.h>
+#include <cbfs.h>
+#include <common.h>
-#include <cpu/samsung/s5p-common/s3c24x0_i2c.h>
-#include "cpu/samsung/exynos5250/dmc.h"
-#include <cpu/samsung/exynos5250/power.h>
+#include <cpu/samsung/exynos5250/setup.h>
+#include <cpu/samsung/exynos5250/dmc.h>
#include <cpu/samsung/exynos5250/clock_init.h>
-#include <cpu/samsung/exynos5-common/uart.h>
-#endif
#include <console/console.h>
+#include <arch/bootblock_exit.h>
+#include <arch/stages.h>
-void main(void);
void main(void)
{
-// volatile unsigned long *pshold = (unsigned long *)0x1004330c;
+ struct cbfs_media cbfs;
// i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
// power_init();
// clock_init();
// exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
console_init();
printk(BIOS_INFO, "hello from romstage\n");
+ struct mem_timings *mem;
+ int ret;
+
+ mem = clock_get_mem_timings();
+ printk(BIOS_SPEW, "clock_get_mem_timings returns 0x%p\n", mem);
+ printk(BIOS_SPEW, "man: 0x%x type: 0x%x, div: 0x%x, mhz: 0x%x\n",
+ mem->mem_manuf,
+ mem->mem_type,
+ mem->mpll_mdiv,
+ mem->frequency_mhz);
+
+ ret = ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE);
+ if (ret) {
+ printk(BIOS_ERR, "Memory controller init failed, err: %x\n",
+ ret);
+ while(1);
+ }
+
+ printk(BIOS_INFO, "ddr3_init done\n");
+ /* wow, did it work? */
+ int i;
+ u32 *c = (void *)CONFIG_RAMBASE;
+
+// mmu_setup(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB * 1024);
+// printk(BIOS_INFO, "mmu_setup done\n");
+ for(i = 0; i < 16384; i++)
+ c[i] = i+32768;
+ for(i = 0; i < 16384; i++)
+ if (c[i] != i+32768)
+ printk(BIOS_SPEW, "BADc[%02x]: %02x,", i, c[i]);
+ for(i = 0; i < 1048576; i++)
+ c[i] = 0;
+ ret = init_default_cbfs_media(&cbfs);
+ if (ret){
+ printk(BIOS_ERR, "init_default_cbfs_media returned %d: HALT\n",
+ ret);
+ while (1);
+ }
+
+ struct cbfs_stage *stage = (struct cbfs_stage *)
+ cbfs_get_file_content(&cbfs, "fallback/coreboot_ram",
+ CBFS_TYPE_STAGE);
+ printk(BIOS_ERR, "Stage: %p\n", stage);
+ printk(BIOS_ERR, "loading stage %s @ 0x%x (0x%x bytes),entry @ 0x%p\n",
+ "ram stage",
+ (uint32_t) stage->load, stage->memlen,
+ (void *)(u32)stage->entry);
+
+#if 0
+ /* for reference and testing ... we should be able to remove soon */
+// c = (void *)(u32)(stage->load + stage->len);
+ c = (void *)(u32)(stage->load);
+ printk(BIOS_ERR, "memzero 0x%x words starting at %p\n",
+ (stage->memlen /*- stage->len*/)/4, c);
+ for(i = 0; i < (stage->memlen /*- stage->len*/)/4; i++){
+ printk(BIOS_INFO, "%p, ", &c[i]);
+ c[i] = 0;
+ }
+#endif
+
+ void *entry = cbfs_load_stage(&cbfs, "fallback/coreboot_ram");
+ printk(BIOS_INFO, "entry is %p\n", entry);
-// *pshold &= ~0x100; /* shut down */
- mmu_setup(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB * 1024);
+ printk(BIOS_INFO, "sayonara, romstage!\n");
+ stage_exit((unsigned long)entry);
}