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authorPaul Menzel <pmenzel@molgen.mpg.de>2020-10-19 18:01:35 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-02-10 07:22:51 +0000
commit79cc5e01b895fdc3740cbe96c81c5f49d0408985 (patch)
treea0e37fc3e05527ab78cc7902355c11354c5091cb /src/mainboard/google/zork
parent94e4961a0122df88d51f000dc148d9bd7d05409b (diff)
mb/google/zork: devicetree: Fix typo in *Coprocessor* in comment
Fixes: b3c41329fd (mb/google/zork: Add Picasso based Zork mainboard and variants) Change-Id: I68cd5ffc3117e714919bbce56e9af4c9982b3d54 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50385 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/google/zork')
-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb2
-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
index 9b0dd9a855..8bc87f7099 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
@@ -264,7 +264,7 @@ chip soc/amd/picasso
device pci 8.1 on # Internal GPP Bridge 0 to Bus A
device pci 0.0 on end # Internal GPU
device pci 0.1 on end # Display HDA
- device pci 0.2 on end # Crypto Coprocesor
+ device pci 0.2 on end # Crypto Coprocessor
device pci 0.3 on # USB 3.1
chip drivers/usb/acpi
register "desc" = ""Root Hub""
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
index a3c4573ce5..f354991970 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
@@ -266,7 +266,7 @@ chip soc/amd/picasso
device pci 8.1 on # Internal GPP Bridge 0 to Bus A
device pci 0.0 on end # Internal GPU
device pci 0.1 on end # Display HDA
- device pci 0.2 on end # Crypto Coprocesor
+ device pci 0.2 on end # Crypto Coprocessor
device pci 0.3 on # USB 3.1
chip drivers/usb/acpi
register "desc" = ""Root Hub""