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authorHsuan-ting Chen <roccochen@google.com>2021-10-27 10:59:41 +0000
committerFelix Held <felix-coreboot@felixheld.de>2021-11-15 12:00:12 +0000
commit642508aa9c44daaad6963df76630d0271cf0930e (patch)
tree48fc09455e47c1e09566a73931c96f8a1a45707b /src/mainboard/google/zork
parent436eac827aea4839169f2421006df42b8c5c379f (diff)
Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"
This reverts commit adb393bdd6cd6734fa2672bd174aca4588a68016. This relands commit 6260bf712a836762b18d80082505e981e040f4bc. Reason for revert: The original CL did not handle some devices correctly. With the fixes: * commit 36721a4 (mb/google/brya: Add GPIO_IN_RW to all variants' early GPIO tables) * commit 3bfe46c (mb/google/guybrush: Add GPIO EC in RW to early GPIO tables) * commit 3a30cf9 (mb/google/guybrush: Build chromeos.c in verstage This CL also fix the following platforms: * Change to always trusted: cyan. * Add to early GPIO table: dedede, eve, fizz, glados, hatch, octopus, poppy, reef, volteer. * Add to both Makefile and early GPIO table: zork. For mb/intel: * adlrvp: Add support for get_ec_is_trusted(). * glkrvp: Add support for get_ec_is_trusted() with always trusted. * kblrvp: Add support for get_ec_is_trusted() with always trusted. * kunimitsu: Add support for get_ec_is_trusted() and initialize it as early GPIO. * shadowmountain: Add support for get_ec_is_trusted() and initialize it as early GPIO. * tglrvp: Add support for get_ec_is_trusted() with always trusted. For qemu-q35: Add support for get_ec_is_trusted() with always trusted. We could attempt another land. Change-Id: I66b8b99d6e6bf259b18573f9f6010f9254357bf9 Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard/google/zork')
-rw-r--r--src/mainboard/google/zork/Makefile.inc1
-rw-r--r--src/mainboard/google/zork/chromeos.c6
-rw-r--r--src/mainboard/google/zork/variants/baseboard/Makefile.inc4
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c31
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c27
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c27
6 files changed, 61 insertions, 35 deletions
diff --git a/src/mainboard/google/zork/Makefile.inc b/src/mainboard/google/zork/Makefile.inc
index ccc163c4dd..a260b0fd21 100644
--- a/src/mainboard/google/zork/Makefile.inc
+++ b/src/mainboard/google/zork/Makefile.inc
@@ -10,6 +10,7 @@ ramstage-y += chromeos.c
ramstage-y += ec.c
ramstage-y += sku_id.c
+verstage-y += chromeos.c
verstage-y += verstage.c
subdirs-y += variants/baseboard
diff --git a/src/mainboard/google/zork/chromeos.c b/src/mainboard/google/zork/chromeos.c
index 35c002d45c..d64919316b 100644
--- a/src/mainboard/google/zork/chromeos.c
+++ b/src/mainboard/google/zork/chromeos.c
@@ -33,3 +33,9 @@ void mainboard_chromeos_acpi_generate(void)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
}
+
+int get_ec_is_trusted(void)
+{
+ /* EC is trusted if not in RW. */
+ return !gpio_get(GPIO_EC_IN_RW);
+}
diff --git a/src/mainboard/google/zork/variants/baseboard/Makefile.inc b/src/mainboard/google/zork/variants/baseboard/Makefile.inc
index 2764a89b08..437ba0b52c 100644
--- a/src/mainboard/google/zork/variants/baseboard/Makefile.inc
+++ b/src/mainboard/google/zork/variants/baseboard/Makefile.inc
@@ -1,23 +1,19 @@
# SPDX-License-Identifier: GPL-2.0-or-later
-bootblock-y += gpio_baseboard_common.c
bootblock-y += helpers.c
bootblock-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c
bootblock-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
-verstage-y += gpio_baseboard_common.c
verstage-y += helpers.c
verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c
verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
verstage-y += tpm_tis.c
-romstage-y += gpio_baseboard_common.c
romstage-y += helpers.c
romstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c
romstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
romstage-y += tpm_tis.c
-ramstage-y += gpio_baseboard_common.c
ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c
ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += fsps_baseboard_trembyle.c
ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c
deleted file mode 100644
index 948ce8f9d4..0000000000
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <baseboard/variants.h>
-#include <soc/gpio.h>
-#include <stdlib.h>
-#include <variant/gpio.h>
-
-static const struct soc_amd_gpio early_gpio_table[] = {
- /* H1_FCH_INT_ODL */
- PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS),
- /* I2C3_SCL - H1 */
- PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
- /* I2C3_SDA - H1 */
- PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
- /* PCIE_RST0_L - Fixed timings */
- PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
- /* FCH_ESPI_EC_CS_L */
- PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
- /* ESPI_ALERT_L */
- PAD_NF(GPIO_108, ESPI_ALERT_L, PULL_NONE),
- /* UART0_RXD - DEBUG */
- PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
- /* UART0_TXD - DEBUG */
- PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
-};
-
-const __weak struct soc_amd_gpio *variant_early_gpio_table(size_t *size)
-{
- *size = ARRAY_SIZE(early_gpio_table);
- return early_gpio_table;
-}
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index 6f8a416657..5d3e21ffb2 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -310,3 +310,30 @@ const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp
*size = ARRAY_SIZE(gpio_sleep_table);
return gpio_sleep_table;
}
+
+static const struct soc_amd_gpio early_gpio_table[] = {
+ /* H1_FCH_INT_ODL */
+ PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS),
+ /* I2C3_SCL - H1 */
+ PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
+ /* I2C3_SDA - H1 */
+ PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
+ /* PCIE_RST0_L - Fixed timings */
+ PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
+ /* FCH_ESPI_EC_CS_L */
+ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
+ /* ESPI_ALERT_L */
+ PAD_NF(GPIO_108, ESPI_ALERT_L, PULL_NONE),
+ /* UART0_RXD - DEBUG */
+ PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
+ /* UART0_TXD - DEBUG */
+ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
+ /* EC_IN_RW_OD */
+ PAD_GPI(GPIO_11, PULL_NONE),
+};
+
+const struct soc_amd_gpio *variant_early_gpio_table(size_t *size)
+{
+ *size = ARRAY_SIZE(early_gpio_table);
+ return early_gpio_table;
+}
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 62935a66a9..415c426f15 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -359,3 +359,30 @@ const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp
*size = ARRAY_SIZE(gpio_sleep_table);
return gpio_sleep_table;
}
+
+static const struct soc_amd_gpio early_gpio_table[] = {
+ /* H1_FCH_INT_ODL */
+ PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS),
+ /* I2C3_SCL - H1 */
+ PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
+ /* I2C3_SDA - H1 */
+ PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
+ /* PCIE_RST0_L - Fixed timings */
+ PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
+ /* FCH_ESPI_EC_CS_L */
+ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
+ /* ESPI_ALERT_L */
+ PAD_NF(GPIO_108, ESPI_ALERT_L, PULL_NONE),
+ /* UART0_RXD - DEBUG */
+ PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
+ /* UART0_TXD - DEBUG */
+ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
+ /* EC_IN_RW_OD */
+ PAD_GPI(GPIO_130, PULL_NONE),
+};
+
+const struct soc_amd_gpio *variant_early_gpio_table(size_t *size)
+{
+ *size = ARRAY_SIZE(early_gpio_table);
+ return early_gpio_table;
+}