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authorFelix Held <felix-coreboot@felixheld.de>2020-12-09 16:25:18 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-11 00:42:32 +0000
commit0dfaf33a1331ede41c052be20217abcf2b70e141 (patch)
treeed9b05541a01a7763debb1d63c93c337a2e0c9f9 /src/mainboard/google/zork
parente7a0202ed04db7aa5033e659345ccc75c3bc0773 (diff)
soc/amd/picasso: rename PICASSO_CONSOLE_UART to AMD_SOC_CONSOLE_UART
This allows factoring out the common initialization for the integrated UARTs. Change-Id: I7399a13b9280b732086c6f8e6dfd9f1207d8c8ff Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48508 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork')
-rw-r--r--src/mainboard/google/zork/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig
index d861f1de6b..c1cbae983f 100644
--- a/src/mainboard/google/zork/Kconfig
+++ b/src/mainboard/google/zork/Kconfig
@@ -34,7 +34,7 @@ config BOARD_SPECIFIC_OPTIONS
select GFXUMA
select GOOGLE_SMBIOS_MAINBOARD_VERSION
select MAINBOARD_HAS_CHROMEOS
- select PICASSO_CONSOLE_UART
+ select AMD_SOC_CONSOLE_UART
select MAINBOARD_HAS_I2C_TPM_CR50
select MAINBOARD_HAS_TPM2
select PCIEXP_ASPM