diff options
| author | Robert Zieba <robertzieba@google.com> | 2022-01-24 16:37:47 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-11 20:08:47 +0000 |
| commit | b26d005bbed27af0dc8cfaad7c1788162336e7e2 (patch) | |
| tree | 754a493b0283b10e925a8de41859eec04e0e369e /src/mainboard/google/zork | |
| parent | 6ba6bc24eb58c77f38a0818dd05da865abfb659b (diff) | |
soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position makefile variables
Currently apu/amdfw_a-position and apu/amdfw_b-position currently depend on CEZANNE_FW_A_POSITION and CEZANNE_FW_B_POSITION. This causes error messages from awk as these variables are sourced from fmap_config.h and these variables are expanded before fmap_config.h is built. However these variables should not be set to CEZANNE_FW_*_POSITION. These files end up in the FW_MAIN_* fmap regions. These regions are placed at the proper locations through the chromeos.fmd file. The apu/amdfw_*-position variables are the positions within these regions where the files end up. These variables should be set to 0x40 to coincide with the beginning of the FW_MAIN_* regions, accounting for the size of struct cbfs_file + filename + metadata, aligned to 64 bytes. Currently they end up in the correct locations only because fmap_config.h does not exist when the apu/amdfw_*-position variables are expanded.
This change explicity sets the value of these variables to 0x40, removing the errors from awk and ensuring that these files end up in the correct location in the resulting image. These changes are also applied to the Picasso and Sabrina makefiles as well.
BUG=b:198322933
TEST=Verified that the apu/amdfw_* files end up in the correct locations as reported by cbfstool during the build, did timeless builds and confirmed that coreboot.rom images were identical, tested AP firmware on guybrush and zork devices
Signed-off-by: Robert Zieba <robertzieba@google.com>
Change-Id: If1c2b61c5be0bcab52e19349dacbcc391e8aa909
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61349
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/mainboard/google/zork')
| -rw-r--r-- | src/mainboard/google/zork/Kconfig | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index 96f40e4492..dfc87bf5d9 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -133,22 +133,6 @@ config DRIVER_TPM_I2C_ADDR hex default 0x50 -config PICASSO_FW_A_POSITION - hex - default 0xFF012040 - depends on VBOOT_SLOTS_RW_AB - help - Location of the AMD firmware in the RW_A region. This is the - start of the RW-A region + 64 bytes for the cbfs header. - -config PICASSO_FW_B_POSITION - hex - default 0xFF312040 - depends on VBOOT_SLOTS_RW_AB - help - Location of the AMD firmware in the RW_B region. This is the - start of the RW-A region + 64 bytes for the cbfs header. - config VARIANT_SUPPORTS_PRE_V3_SCHEMATICS bool default y if BOARD_GOOGLE_TREMBYLE |