diff options
author | Kane Chen <kane_chen@pegatron.corp-partner.google.com> | 2020-11-03 10:03:25 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-10 06:16:41 +0000 |
commit | a3ac82092f0d991ad4393f0d31b689760be8338e (patch) | |
tree | 8f3fe3fd1e775e6b8264675feef2cf0a84f70d40 /src/mainboard/google/zork/variants/shuboz/overridetree.cb | |
parent | 85d0e7611a5cf9dcbf7d82deb54cc7e1e6fc79e8 (diff) |
mb/google/zork: Create Shuboz variant
Create the shuboz variant of the zork reference board by copying
the template files to a new directory named for the variant.
(Auto-Generated by create_coreboot_variant.sh version 4.2.0).
BUG=b:172021093
BRANCH=none
TEST=emerge-zork coreboot
Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: I3f62625f8cbde1c9adf8ab335edeb9e811e32679
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47152
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/shuboz/overridetree.cb')
-rw-r--r-- | src/mainboard/google/zork/variants/shuboz/overridetree.cb | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/shuboz/overridetree.cb b/src/mainboard/google/zork/variants/shuboz/overridetree.cb new file mode 100644 index 0000000000..1cc2364f5e --- /dev/null +++ b/src/mainboard/google/zork/variants/shuboz/overridetree.cb @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +chip soc/amd/picasso + + # Start : OPN Performance Configuration + # See devhub #56670 Chapter 5 for documentation + # For the below fields, 0 indicates use SOC default + + # System config index + register "system_config" = "1" + + # Set STAPM confiuration. All of these fields must be set >0 to take affect + register "slow_ppt_limit_mW" = "6000" + register "fast_ppt_limit_mW" = "9000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "2500" + register "sustained_power_limit_mW" = "4800" + + # End : OPN Performance Configuration + + # I2C2 for touchscreen and trackpad + + register "i2c[2]" = "{ + .speed = I2C_SPEED_FAST, + }" + + # I2C3 for H1 + + register "i2c[3]" = "{ + .speed = I2C_SPEED_FAST, + .early_init = true, + }" + + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. + device domain 0 on + subsystemid 0x1022 0x1510 inherit + end # domain + + device mmio 0xfedc4000 on # APU_I2C2_BASE + end # device + +end # chip soc/amd/picasso |