diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-07-22 00:47:40 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-07-23 14:11:49 +0000 |
| commit | dcee4b6fa95d52d78f068ee3bac4147b8c9f074a (patch) | |
| tree | ff77fd8322828bbd10c62424c1c0491e7608a3f3 /src/mainboard/google/zork/variants/morphius | |
| parent | 29785027054a3a55b0072f3b3d2f0086708cfe6a (diff) | |
mb/google/zork: Fix Goodix touchscreen ACPI node
This change does the following:
a. USI_REPORT_EN is no longer set to high in coreboot. Instead
GPIO_144 is exposed as stop_gpio in ACPI to allow OS to control this
pad as required.
b. Appropriate delays are added for power-down sequencing:
- Delay after REPORT_EN is disabled - 1ms
- Delay after RESET is asserted - 1ms
BUG=b:159501288
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: If4d12fa0d4f4e5123d8fdccdabda996dcafa4523
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/morphius')
| -rw-r--r-- | src/mainboard/google/zork/variants/morphius/overridetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index 1e9a2c83b9..bc98beea51 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -67,6 +67,9 @@ chip soc/amd/picasso register "generic.probed" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_delay_ms" = "120" + register "generic.reset_off_delay_ms" = "1" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)" + register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" register "hid_desc_reg_offset" = "0x01" |