diff options
author | Furquan Shaikh <furquan@google.com> | 2020-07-15 13:58:59 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2020-07-16 16:45:27 +0000 |
commit | 56f949cd0c793e0a43d4339ce6e2e8003f5ce978 (patch) | |
tree | 12c80f29d1c4940ce51d52ee8df5f9e2e5af78d5 /src/mainboard/google/zork/variants/baseboard/include | |
parent | 6a5c77cc846384dbc10c3546f70245025787ef08 (diff) |
mb/google/zork: Drop variant_romstage_gpio_table()
gpio_set_stage_rom table is now configuring only PCIe related GPIOs in
romstage. This change moves the configuration of PCIe related GPIOs to
variant_pcie_gpio_configure() to keep all the configuration for WiFi and
non-WiFi PCIe pads in one place. It also drops the function
variant_romstage_gpio_table() as it is unused.
BUG=b:154351731
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Ib1c41ba141dce6b52b6e0a250a3aa07c296068aa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43475
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard/include')
-rw-r--r-- | src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index dab7332f61..90e8b04212 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -12,7 +12,6 @@ const struct sci_source *variant_gpe_table(size_t *num); const struct soc_amd_gpio *variant_early_gpio_table(size_t *size); -const struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size); /* * This function provides base GPIO configuration table. It is typically provided by * baseboard using a weak implementation. If GPIO configuration for a variant differs @@ -36,8 +35,8 @@ const struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ); void variant_devtree_update(void); /* Update audio configuration in devicetree during ramstage. */ void variant_audio_update(void); -/* Configure PCIe power and reset lines as per variant sequencing requirements. */ -void variant_pcie_power_reset_configure(void); +/* Configure PCIe GPIOs as per variant sequencing requirements. */ +void variant_pcie_gpio_configure(void); /* Per variant FSP-S initialization, default implementation in baseboard and * overrideable by the variant. */ |