diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-07-23 18:22:30 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-07-26 17:08:00 +0000 |
| commit | 3a7389ef1055769f7c6d9ce53025b69e69f15349 (patch) | |
| tree | 5afa328c88f1b7a65dbe8ec2c83d179d5eb6ea17 /src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb | |
| parent | 4e58ce15351d95aabc529b6affe91d2b0a7993d0 (diff) | |
amd/picasso: rework USB2 PHY tune parameter handling
BUG=b:161923068
Change-Id: I67f23c0602e345fbd806e661a4462cf07f93ef64
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43783
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb')
| -rw-r--r-- | src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 4a01a12cc0..6f72c8581b 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -54,7 +54,7 @@ chip soc/amd/picasso register "has_usb2_phy_tune_params" = "1" # Controller0 Port0 Default - register "usb_2_port_0_tune_params" = "{ + register "usb_2_port_tune_params[0]" = "{ .com_pds_tune = 0x03, .sq_rx_tune = 0x3, .tx_fsls_tune = 0x3, @@ -67,7 +67,7 @@ chip soc/amd/picasso }" # Controller0 Port1 Default - register "usb_2_port_1_tune_params" = "{ + register "usb_2_port_tune_params[1]" = "{ .com_pds_tune = 0x03, .sq_rx_tune = 0x3, .tx_fsls_tune = 0x3, @@ -80,7 +80,7 @@ chip soc/amd/picasso }" # Controller0 Port2 Default - register "usb_2_port_2_tune_params" = "{ + register "usb_2_port_tune_params[2]" = "{ .com_pds_tune = 0x03, .sq_rx_tune = 0x3, .tx_fsls_tune = 0x3, @@ -93,7 +93,7 @@ chip soc/amd/picasso }" # Controller0 Port3 Default - register "usb_2_port_3_tune_params" = "{ + register "usb_2_port_tune_params[3]" = "{ .com_pds_tune = 0x03, .sq_rx_tune = 0x3, .tx_fsls_tune = 0x3, @@ -106,7 +106,7 @@ chip soc/amd/picasso }" # Controller1 Port0 Default - register "usb_2_port_4_tune_params" = "{ + register "usb_2_port_tune_params[4]" = "{ .com_pds_tune = 0x03, .sq_rx_tune = 0x3, .tx_fsls_tune = 0x3, @@ -119,7 +119,7 @@ chip soc/amd/picasso }" # Controller1 Port1 Default - register "usb_2_port_5_tune_params" = "{ + register "usb_2_port_tune_params[5]" = "{ .com_pds_tune = 0x03, .sq_rx_tune = 0x3, .tx_fsls_tune = 0x3, |