diff options
author | Raul E Rangel <rrangel@chromium.org> | 2020-05-20 14:07:41 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2020-05-27 23:18:12 +0000 |
commit | b3c41329fdca84a251c183bbc2b0767978e9d96f (patch) | |
tree | 47003eae89ad4f6dd86edb52b1fe203d7e7b14b5 /src/mainboard/google/zork/variants/baseboard/Makefile.inc | |
parent | fc9b8b916f7bc0c6ac1579b915937ed23ea3327a (diff) |
mb/google/zork: Add Picasso based Zork mainboard and variants
This is a copy of the mb/google/zork directory from the chromiumos
coreboot-zork branch. This was from commit 29308ac8606.
See https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/29308ac8606/src/mainboard/google/zork
Changes:
* Minor changes to make the board build.
* Add bootblock.c.
* Modify romstage.c
* Removed the FSP_X configs from zork/Kconfig since they should be
set in picasso/Kconfig. picasso/Kconfig doesn't currently define the
binaries since they haven't been published. To get a working build
a custom config that sets FSP_X_FILE is required.
BUG=b:157140753
TEST=Build trembyle and boot to OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I3933fa54e3f603985a0818852a1c77d8e248484f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41581
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard/Makefile.inc')
-rw-r--r-- | src/mainboard/google/zork/variants/baseboard/Makefile.inc | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/Makefile.inc b/src/mainboard/google/zork/variants/baseboard/Makefile.inc new file mode 100644 index 0000000000..4bcaf68aed --- /dev/null +++ b/src/mainboard/google/zork/variants/baseboard/Makefile.inc @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +bootblock-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c +bootblock-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c + +ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) +verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c +verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c +endif +verstage-y += tpm_tis.c + +romstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c +romstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c +romstage-y += tpm_tis.c + +ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c +ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += fsps_baseboard_trembyle.c +ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c +ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += fsps_baseboard_dalboz.c +ramstage-y += helpers.c +ramstage-y += tpm_tis.c + +# Add OEM ID table +ifeq ($(CONFIG_USE_OEM_BIN),y) +cbfs-files-y += oem.bin +oem.bin-file := $(call strip_quotes,$(CONFIG_OEM_BIN_FILE)) +oem.bin-type := raw +endif #($(CONFIG_USE_OEM_BIN),y) + +# APCB Board ID GPIO configuration. +# These GPIOs determine which memory SPD will be used during boot. +# APCB_BOARD_ID_GPIO[0-3] = GPIO_NUMBER GPIO_IO_MUX GPIO_BANK_CTL +# GPIO_NUMBER: FCH GPIO number +# GPIO_IO_MUX: Value write to IOMUX to configure this GPIO +# GPIO_BANK_CTL: Value write to GPIOBankCtl[23:16] to configure this GPIO +ifeq ($(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE),y) +APCB_BOARD_ID_GPIO0 = 121 1 0 +APCB_BOARD_ID_GPIO1 = 120 1 0 +APCB_BOARD_ID_GPIO2 = 131 3 0 +APCB_BOARD_ID_GPIO3 = 116 1 0 +else ifeq ($(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ),y) +APCB_BOARD_ID_GPIO0 = 132 1 0 +APCB_BOARD_ID_GPIO1 = 90 1 0 +APCB_BOARD_ID_GPIO2 = 86 3 0 +APCB_BOARD_ID_GPIO3 = 69 1 0 +else +$(error Undefined APCB selection GPIOS for Zork baseboard) +endif #($(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE),y) |