diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-06-18 23:14:51 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-07-01 17:54:22 +0000 |
| commit | e266eb82d9fc84b3c1c1e09c677e8b5d839626bb (patch) | |
| tree | 39178b14e7a82de35f3455e78c4e1c2460a71d5c /src/mainboard/google/zork/smihandler.c | |
| parent | 94dfaad7253a1982b7feaf1bf7b1e4f1c872595d (diff) | |
mb/google/zork: Add support for GPIO configuration on sleep path
This change adds support to configure GPIOs on the sleep path. This is
required to turn off power to devices that do not act as wake sources
and to assert reset to devices.
Currently, variant_sleep_gpio_table() returns an empty table by
default. In the following changes, entries will be added to
gpio_sleep_table.
BUG=b:152582706
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I7286cbf165024bdd81f8748e525542dce8dd8702
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2253642
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42932
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/zork/smihandler.c')
| -rw-r--r-- | src/mainboard/google/zork/smihandler.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/smihandler.c b/src/mainboard/google/zork/smihandler.c index 7c88215ecb..12a3b64c20 100644 --- a/src/mainboard/google/zork/smihandler.c +++ b/src/mainboard/google/zork/smihandler.c @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ + #include <acpi/acpi.h> +#include <baseboard/variants.h> #include <cpu/x86/smm.h> #include <ec/google/chromeec/smm.h> #include <gpio.h> @@ -15,10 +17,17 @@ void mainboard_smi_gpi(u32 gpi_sts) } void mainboard_smi_sleep(u8 slp_typ) { + size_t num_gpios; + const struct soc_amd_gpio *gpios; + if (CONFIG(EC_GOOGLE_CHROMEEC)) chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS); + + gpios = variant_sleep_gpio_table(&num_gpios, slp_typ); + program_gpios(gpios, num_gpios); } + int mainboard_smi_apmc(u8 apmc) { if (CONFIG(EC_GOOGLE_CHROMEEC)) |