diff options
author | Nick Vaccaro <nvaccaro@google.com> | 2017-08-28 17:34:36 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-28 18:28:59 +0000 |
commit | d3e00ab209bde3026082ec6656cefa6dc23de38a (patch) | |
tree | ae8a1c9a136048afbdc1ab3e3e312ab5541fa0c0 /src/mainboard/google/zoombini/chromeos.c | |
parent | bc652b97172b70374c2dbf05dbc225c793be4308 (diff) |
google/zoombini: Add new board
Add zoombini board files using cannonlake and FSP 2.0.
Copied most initial files from poppy and cannonlake_rvp.
BUG=b:64395641
BRANCH=None
TEST=Compiles successfully using "./util/abuild/abuild
-p none -t google/zoombini -x -a"
Change-Id: I13ebaae403d08f1b2e6881eeba4dc1787c792b4e
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/21273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/zoombini/chromeos.c')
-rw-r--r-- | src/mainboard/google/zoombini/chromeos.c | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/google/zoombini/chromeos.c b/src/mainboard/google/zoombini/chromeos.c new file mode 100644 index 0000000000..8ca643e420 --- /dev/null +++ b/src/mainboard/google/zoombini/chromeos.c @@ -0,0 +1,52 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi.h> +#include <baseboard/gpio.h> +#include <boot/coreboot_tables.h> +#include <gpio.h> +#include <rules.h> +#include <soc/gpio.h> +#include <vendorcode/google/chromeos/chromeos.h> + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + struct lb_gpio chromeos_gpios[] = { + {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, + {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, + {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, + {-1, ACTIVE_HIGH, 0, "power"}, + {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, + {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), + "EC in RW"}, + }; + lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); +} + +int get_write_protect_state(void) +{ + /* Read PCH_WP GPIO. */ + return gpio_get(GPIO_PCH_WP); +} + +static const struct cros_gpio cros_gpios[] = { + CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), + CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), +}; + +void mainboard_chromeos_acpi_generate(void) +{ + chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); +} |