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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-04-01 12:22:00 -0700
committerFurquan Shaikh <furquan@google.com>2020-04-13 15:51:01 +0000
commit3907a64a48cb338dfbe85fd2f192ea70d254d3f4 (patch)
tree4fa54e06f391f59d3b816f9bd7f914078b877cf6 /src/mainboard/google/volteer
parent4ed96f2443f0e15d64df1449ec29af8520d9bfb9 (diff)
mb/google/volteer: enable Early Command Training
Update memory configuration on Tiger Lake platform to enable Early Command Training. This feature was not supported before FSP v2527. BUG=b:150357377 BRANCH=None TEST= Build and boot volteer Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I674c30f4dfc1af6c0c4a460d66684545a190caf3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40023 Reviewed-by: Dossym Nurmukhanov <dossym@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer')
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/memory.c2
-rw-r--r--src/mainboard/google/volteer/variants/malefor/memory.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/memory.c b/src/mainboard/google/volteer/variants/baseboard/memory.c
index f2c5a5a146..57a2c5e285 100644
--- a/src/mainboard/google/volteer/variants/baseboard/memory.c
+++ b/src/mainboard/google/volteer/variants/baseboard/memory.c
@@ -58,7 +58,7 @@ static const struct lpddr4x_cfg baseboard_memcfg = {
[7] = { 0, 1 }, /* DDR7_DQS[1:0] */
},
- .ect = 0, /* Disable Early Command Training */
+ .ect = 1, /* Enable Early Command Training */
};
const struct lpddr4x_cfg *__weak variant_memory_params(void)
diff --git a/src/mainboard/google/volteer/variants/malefor/memory.c b/src/mainboard/google/volteer/variants/malefor/memory.c
index 4e5313db36..e1a4cf0781 100644
--- a/src/mainboard/google/volteer/variants/malefor/memory.c
+++ b/src/mainboard/google/volteer/variants/malefor/memory.c
@@ -52,7 +52,7 @@ static const struct lpddr4x_cfg malefor_memcfg = {
[7] = { 0, 1 }, /* DDR7_DQS[1:0] */
},
- .ect = 0, /* Disable Early Command Training */
+ .ect = 1, /* Enable Early Command Training */
};
const struct lpddr4x_cfg *variant_memory_params(void)