diff options
author | Jes Klinke <jbk@google.com> | 2020-12-01 15:21:38 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-12-08 16:59:37 +0000 |
commit | 6e929acb73fd861c45f2b013a0d64f77b247b124 (patch) | |
tree | c123cd7eeebb9281a59dd00d479aadb1fac80a0f /src/mainboard/google/volteer | |
parent | a97fb7f9604ea9d90865c577d37376b82c915fb9 (diff) |
mb/google/volteer: ACPI nodes for volteer2_ti50
Unique among the Volteer devices, the volteer2_ti50 variant connects to
the TPM via I2C. This CL introduces the proper devicestree declarations
for the Linux kernel to recognize that.
overridetree.cb is shared between "sub"-variants volteer2 and
volteer2_ti50, so both will have two TPM nodes, the I2C being disabled
by default. The odd _ti50 variant then has code in variant.c to enable
the I2C node and disable the SPI node.
BUG=b:173461736
TEST=abuild -t GOOGLE_VOLTEER2{_TI50,} -c max -x
Change-Id: I5576a595bbabc34c62b768f8b3439e35ff6bcf7b
Signed-off-by: Jes Bodi Klinke <jbk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48223
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer')
6 files changed, 57 insertions, 7 deletions
diff --git a/src/mainboard/google/volteer/Kconfig.name b/src/mainboard/google/volteer/Kconfig.name index 9b66662b5a..8777994ae7 100644 --- a/src/mainboard/google/volteer/Kconfig.name +++ b/src/mainboard/google/volteer/Kconfig.name @@ -61,6 +61,7 @@ config BOARD_GOOGLE_VOLTEER2 select VARIANT_HAS_MIPI_CAMERA select SOC_INTEL_CSE_LITE_SKU select DRIVERS_GENESYSLOGIC_GL9755 + select DRIVER_I2C_TPM_ACPI # Reworked Volteer2 prototype, Haven chip replaced with Dauntless demo board config BOARD_GOOGLE_VOLTEER2_TI50 @@ -69,6 +70,7 @@ config BOARD_GOOGLE_VOLTEER2_TI50 select VARIANT_HAS_MIPI_CAMERA select SOC_INTEL_CSE_LITE_SKU select DRIVERS_GENESYSLOGIC_GL9755 + select DRIVER_I2C_TPM_ACPI config BOARD_GOOGLE_VOXEL bool "-> Voxel" diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c index ea9e08f294..1f20e18ec7 100644 --- a/src/mainboard/google/volteer/mainboard.c +++ b/src/mainboard/google/volteer/mainboard.c @@ -23,8 +23,8 @@ extern struct chip_operations drivers_intel_pmc_mux_conn_ops; static bool is_port1(struct device *dev) { - return dev->path.type == DEVICE_PATH_GENERIC && dev->path.generic.id == 1 && - dev->chip_ops == &drivers_intel_pmc_mux_conn_ops; + return dev->path.type == DEVICE_PATH_GENERIC && dev->path.generic.id == 1 + && dev->chip_ops == &drivers_intel_pmc_mux_conn_ops; } static void typec_orientation_fixup(void) @@ -53,14 +53,15 @@ static void typec_orientation_fixup(void) if (!conn) return; - if (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) || - fw_config_probe(FW_CONFIG(DB_USB, USB3_ACTIVE)) || - fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)) || - fw_config_probe(FW_CONFIG(DB_USB, USB3_NO_A))) { + if (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) + || fw_config_probe(FW_CONFIG(DB_USB, USB3_ACTIVE)) + || fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)) + || fw_config_probe(FW_CONFIG(DB_USB, USB3_NO_A))) { struct drivers_intel_pmc_mux_conn_config *config = conn->chip_info; if (config) { - printk(BIOS_INFO, "Configure Right Type-C port orientation for retimer\n"); + printk(BIOS_INFO, + "Configure Right Type-C port orientation for retimer\n"); config->sbu_orientation = TYPEC_ORIENTATION_NORMAL; } } @@ -70,6 +71,11 @@ static void mainboard_init(struct device *dev) { mainboard_ec_init(); typec_orientation_fixup(); + variant_devtree_update(); +} + +void __weak variant_devtree_update(void) +{ } static void add_fw_config_oem_string(const struct fw_config *config, void *arg) diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h index 84081983c3..4d5dc87cb9 100644 --- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h @@ -21,4 +21,7 @@ const struct cros_gpio *variant_cros_gpios(size_t *num); const struct ddr_memory_cfg *variant_memory_params(void); int variant_memory_sku(void); +/* Modify devictree settings during ramstage. */ +void variant_devtree_update(void); + #endif /* __BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/volteer/variants/volteer2/Makefile.inc b/src/mainboard/google/volteer/variants/volteer2/Makefile.inc index 13269db5ec..04af3aec1a 100644 --- a/src/mainboard/google/volteer/variants/volteer2/Makefile.inc +++ b/src/mainboard/google/volteer/variants/volteer2/Makefile.inc @@ -3,3 +3,4 @@ bootblock-y += gpio.c ramstage-y += gpio.c +ramstage-y += variant.c diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index a1012a665a..916777c0a3 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -201,6 +201,11 @@ chip soc/intel/tigerlake register "key.label" = ""pen_eject"" device generic 0 on end end + chip drivers/i2c/tpm + register "hid" = ""GOOG0005"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C21_IRQ)" + device i2c 50 off end + end end device ref i2c2 on chip drivers/i2c/sx9310 diff --git a/src/mainboard/google/volteer/variants/volteer2/variant.c b/src/mainboard/google/volteer/variants/volteer2/variant.c new file mode 100644 index 0000000000..057bb8ad65 --- /dev/null +++ b/src/mainboard/google/volteer/variants/volteer2/variant.c @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <baseboard/variants.h> +#include <soc/pci_devs.h> +#include <acpi/acpi_device.h> + +extern struct chip_operations drivers_i2c_tpm_ops; + +static bool match_i2c_tpm(DEVTREE_CONST struct device *dev) +{ + return dev->chip_ops == &drivers_i2c_tpm_ops; +} + +/* + * This function runs only on the volteer_ti50 variant, which has the GSC on a + * reworked I2C bus. + */ +static void devtree_enable_i2c_tpm(void) +{ + struct device *spi_tpm = pcidev_path_on_root(PCH_DEVFN_GSPI0)->link_list->children; + struct device *i2c_tpm = dev_find_matching_device_on_bus( + pcidev_path_on_root(PCH_DEVFN_I2C1)->link_list, match_i2c_tpm); + if (!i2c_tpm || !spi_tpm) + return; + spi_tpm->enabled = 0; + i2c_tpm->enabled = 1; +} + +void variant_devtree_update(void) +{ + if (CONFIG(MAINBOARD_HAS_I2C_TPM_CR50)) + devtree_enable_i2c_tpm(); +} |