diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-06-02 00:34:47 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-06-12 21:26:42 +0000 |
| commit | 55d00c5a99a6bd95efed997e04b4f57b9586cec3 (patch) | |
| tree | 5382ea3d719a09baf73a6aec42fc6d3c921a0038 /src/mainboard/google/volteer | |
| parent | 1e14de8bda93fda4c0ace8b6421d67e8605758bb (diff) | |
mb/google/volteer/var/voxel: Add memory parts and generate DRAM IDs
This change adds memory parts used by variant voxel to
mem_list_variant.txt and generates DRAM IDs allocated to these parts.
This variant is not yet supported by coreboot but DRAM IDs need to be
generated for it. In the coming days, variant voxel will be added to
coreboot.
BUG=b:157732528
Change-Id: I8780beec987deb8fed11bb8f84275dcba4768514
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41994
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer')
4 files changed, 20 insertions, 2 deletions
diff --git a/src/mainboard/google/volteer/variants/voxel/Makefile.inc b/src/mainboard/google/volteer/variants/voxel/Makefile.inc index c9a128d72a..13269db5ec 100644 --- a/src/mainboard/google/volteer/variants/voxel/Makefile.inc +++ b/src/mainboard/google/volteer/variants/voxel/Makefile.inc @@ -1,7 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -SPD_SOURCES = - bootblock-y += gpio.c ramstage-y += gpio.c diff --git a/src/mainboard/google/volteer/variants/voxel/memory/Makefile.inc b/src/mainboard/google/volteer/variants/voxel/memory/Makefile.inc new file mode 100644 index 0000000000..d18a906b34 --- /dev/null +++ b/src/mainboard/google/volteer/variants/voxel/memory/Makefile.inc @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-or-later +## This is an auto-generated file. Do not edit!! + +SPD_SOURCES = +SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR +SPD_SOURCES += spd-4.hex # ID = 1(0b0001) Parts = MT53E1G32D2NP-046 WT:A +SPD_SOURCES += spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR diff --git a/src/mainboard/google/volteer/variants/voxel/memory/dram_id.generated.txt b/src/mainboard/google/volteer/variants/voxel/memory/dram_id.generated.txt new file mode 100644 index 0000000000..8d472df850 --- /dev/null +++ b/src/mainboard/google/volteer/variants/voxel/memory/dram_id.generated.txt @@ -0,0 +1,7 @@ +DRAM Part Name ID to assign +MT53E512M32D2NP-046 WT:E 0 (0000) +H9HCNNNBKMMLXR-NEE 0 (0000) +K4U6E3S4AA-MGCR 0 (0000) +MT53E1G32D2NP-046 WT:A 1 (0001) +H9HCNNNCPMMLXR-NEE 2 (0010) +K4UBE3D4AA-MGCR 2 (0010) diff --git a/src/mainboard/google/volteer/variants/voxel/memory/mem_list_variant.txt b/src/mainboard/google/volteer/variants/voxel/memory/mem_list_variant.txt new file mode 100644 index 0000000000..5ddd52ebba --- /dev/null +++ b/src/mainboard/google/volteer/variants/voxel/memory/mem_list_variant.txt @@ -0,0 +1,6 @@ +MT53E512M32D2NP-046 WT:E +H9HCNNNBKMMLXR-NEE +K4U6E3S4AA-MGCR +MT53E1G32D2NP-046 WT:A +H9HCNNNCPMMLXR-NEE +K4UBE3D4AA-MGCR |