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authorKevin Chang <kevin.chang@lcfc.corp-partner.google.com>2021-04-23 10:12:46 +0800
committerNick Vaccaro <nvaccaro@google.com>2021-04-26 22:36:42 +0000
commitf005dda9dd7b350609479d8778a43cc721603201 (patch)
treea05b7e3383f00b3afaf92df24f4c21d44dd3b22f /src/mainboard/google/volteer/variants
parent1fb5395d9d2d96c2e570c545744c662c26413593 (diff)
mb/google/volteer/variant/lindar: Disable acoustic mitigation
Roll back CPU slow slew rate setting to Intel default "SLEW_FAST_2" Because baseboard modify slow slew rate setting to "SLEW_FASE_8" for all project, but Lindar and Lillipup is using "SLEW_FAST_2", so this setting need to roll back. BUG=b:186140230 TEST=Build FW and boot to OS checking with CPU log. Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> Change-Id: I7de252b26c75f8dad218f3eb79a0988e60964f4c Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52620 Reviewed-by: Zhuohao Lee <zhuohao@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants')
-rw-r--r--src/mainboard/google/volteer/variants/lindar/overridetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb
index 945d2e913c..a1010d2318 100644
--- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb
@@ -57,6 +57,12 @@ chip soc/intel/tigerlake
[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
+
+ # Acoustic settings
+ register "AcousticNoiseMitigation" = "0"
+ register "SlowSlewRate" = "SLEW_FAST_2"
+ register "FastPkgCRampDisable" = "0"
+
device domain 0 on
device ref dptf on
chip drivers/intel/dptf