mb/google/volteer: Fix USB port definitions

Commit bc8f5405b542 ("tgl mainboards: Move usb{2,3}_ports settings into
XHCI device scope") not only moved the USB port definitions under the
XHCI device reference, but also combined multiple register definitions.
In doing so, it broke the inheritance from the baseboard, since the
variant overridetree registers now replaced the entire usb2_ports/
usb3_ports structs, rather than replacing individual array elements
therein. This resulted in any USB ports inherited from the baseboard
and not overridden by the variant being non-functional as they were
not included in the resulting combined devicetree.

To fix this, return to overriding individual array elements in the
usb2/3_ports structs.

TEST=build/boot google/drobit. Verify all USB ports present and
functional. Verify mainboard/static.c in built shows all ports.

Change-Id: I54921fa4ecf594a1ecbcfa7c45e5d745d4a95652
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84348
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>

16 files changed, 100 insertions, 144 deletions

diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 4ff518e6fa..bc062d8c6f 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -393,22 +393,18 @@ chip soc/intel/tigerlake
 		device ref gna on end
 		device ref north_xhci on end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[0] = USB2_PORT_MID(OC_SKIP),	// Type-A Port A0
-				[1] = USB2_PORT_MID(OC_SKIP),	// Type-A Port A1
-				[2] = USB2_PORT_MID(OC_SKIP),	// M.2 WWAN
-				[3] = USB2_PORT_MID(OC_SKIP),	// Type-A / Type-C Cl
-				[4] = USB2_PORT_MID(OC_SKIP),	// M.2 Camera
-				[8] = USB2_PORT_MID(OC_SKIP),	// Type-A / Type-C Co
-				[9] = USB2_PORT_MID(OC_SKIP),	// M.2 Bluetooth
-			}"
-
-			register "usb3_ports" = "{
-				[0] = USB3_PORT_DEFAULT(OC1),	// USB3/2 Type A port A0
-				[1] = USB3_PORT_DEFAULT(OC2),	// USB3/2 Type A port A1
-				[2] = USB3_PORT_DEFAULT(OC_SKIP),	// M.2 WWAN
-				[3] = USB3_PORT_DEFAULT(OC_SKIP),	// M.2 Camera
-			}"
+			register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A Port A0
+			register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A Port A1
+			register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 WWAN
+			register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A / Type-C Cl
+			register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 Camera
+			register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A / Type-C Co
+			register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 Bluetooth
+
+			register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)"	# USB3/2 Type A port A0
+			register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)"	# USB3/2 Type A port A1
+			register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# M.2 WWAN
+			register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# M.2 Camera
 		end
 		device ref shared_ram on end
 		device ref cnvi_wifi on
diff --git a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb
index 09fc980d40..6a94e0190f 100644
--- a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb
@@ -131,11 +131,9 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[2] = USB2_PORT_EMPTY,			// Disable M.2 WWAN
-				[3] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C1
-				[8] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C0
-			}"
+			register "usb2_ports[2]" = "USB2_PORT_EMPTY"		# Disable M.2 WWAN
+			register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C1
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C0
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
diff --git a/src/mainboard/google/volteer/variants/collis/overridetree.cb b/src/mainboard/google/volteer/variants/collis/overridetree.cb
index ab4137e590..6c24b06e6d 100644
--- a/src/mainboard/google/volteer/variants/collis/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/collis/overridetree.cb
@@ -239,19 +239,15 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[0] = USB2_PORT_TYPE_C(OC1),	// Type-A Port A0
-				[1] = USB2_PORT_TYPE_C(OC2),	// Type-A Port A1
-				[2] = USB2_PORT_TYPE_C(OC0),	// Type-C Port C1
-				[3] = USB2_PORT_MID(OC_SKIP),	// Front Camera
-				[4] = USB2_PORT_TYPE_C(OC3),	// Type-C Port C0
-				[5] = USB2_PORT_MID(OC_SKIP),	// WFC Camera
-			}"
+			register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC1)"	# Type-A Port A0
+			register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)"	# Type-A Port A1
+			register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port C1
+			register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"	# Front Camera
+			register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)"	# Type-C Port C0
+			register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"	# WFC Camera
 
-			register "usb3_ports" = "{
-				[0] = USB3_PORT_DEFAULT(OC1),	// USB3/2 Type-A Port A0
-				[1] = USB3_PORT_DEFAULT(OC2),	// USB3/2 Type-A Port A1
-			}"
+			register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)"	# USB3/2 Type-A Port A0
+			register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)"	# USB3/2 Type-A Port A1
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
diff --git a/src/mainboard/google/volteer/variants/copano/overridetree.cb b/src/mainboard/google/volteer/variants/copano/overridetree.cb
index 619b203f9f..2291ce531d 100644
--- a/src/mainboard/google/volteer/variants/copano/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/copano/overridetree.cb
@@ -266,12 +266,10 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[0] = USB2_PORT_TYPE_C(OC0),	// Type-A / Type-C Port 0
-				[2] = USB2_PORT_TYPE_C(OC1),	// Type-A / Type-C Port 1
-				[3] = USB2_PORT_MID(OC_SKIP),	// Front Camera
-				[4] = USB2_PORT_TYPE_C(OC0),	// Type-A / Type-C Port 0
-			}"
+			register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-A / Type-C Port 0
+			register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC1)"	# Type-A / Type-C Port 1
+			register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"	# Front Camera
+			register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC0)"	# Type-A / Type-C Port 0
 
 			register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# Type-A / Type-C Port 0
 
diff --git a/src/mainboard/google/volteer/variants/delbin/overridetree.cb b/src/mainboard/google/volteer/variants/delbin/overridetree.cb
index 92bd9e56c4..0bb1f1167d 100644
--- a/src/mainboard/google/volteer/variants/delbin/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/delbin/overridetree.cb
@@ -245,18 +245,16 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				// These settings improve the USB2 Port4 eye diagram
-				[3] = {
-					.enable = 1,
-					.tx_bias = USB2_BIAS_28P15MV,
-					.tx_emp_enable = USB2_PRE_EMP_ON,
-					.pre_emp_bias = USB2_BIAS_56P3MV,
-					.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
-					.type_c = 1,
-				},
-				[8] = USB2_PORT_TYPE_C(OC_SKIP),
+			# These settings improve the USB2 Port4 eye diagram
+			register "usb2_ports[3]" = "{
+				.enable = 1,
+				.tx_bias = USB2_BIAS_28P15MV,
+				.tx_emp_enable = USB2_PRE_EMP_ON,
+				.pre_emp_bias = USB2_BIAS_56P3MV,
+				.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
+				.type_c = 1,
 			}"
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)"
 
 
 			chip drivers/usb/acpi
diff --git a/src/mainboard/google/volteer/variants/drobit/overridetree.cb b/src/mainboard/google/volteer/variants/drobit/overridetree.cb
index 1269f17b61..4f74ff2959 100644
--- a/src/mainboard/google/volteer/variants/drobit/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/drobit/overridetree.cb
@@ -257,10 +257,8 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[3] = USB2_PORT_TYPE_C(OC0),	// Type-C port 1
-				[8] = USB2_PORT_TYPE_C(OC3),	// Type-C port 0
-			}"
+			register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C port 1
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC3)"	# Type-C port 0
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
index 2b2f32c5ac..89b0d15123 100644
--- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
@@ -222,35 +222,31 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[1] = USB2_PORT_EMPTY,	// Disable Type-A Port A1
-				[2] = USB2_PORT_EMPTY,	// Disable M.2 WWAN
-
-				// improve the USB2 Port1 eye diagram
-				[3] = {
-					.enable = 1,
-					.ocpin = OC_SKIP,
-					.tx_bias = USB2_BIAS_39P35MV,
-					.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
-					.pre_emp_bias = USB2_BIAS_39P35MV,
-					.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
-					.type_c = 1,
-				},
-
-				// lower camera driving
-				[4] = {
-					.enable = 1,
-					.ocpin = OC_SKIP,
-					.tx_bias = USB2_BIAS_0MV,
-					.tx_emp_enable = USB2_EMP_OFF,
-					.pre_emp_bias = USB2_BIAS_0MV,
-					.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
-				},
-
-				// Type-A / Type-C C0
-				[8] = USB2_PORT_TYPE_C(OC_SKIP),
+			# Disable Type-A Port A1
+			register "usb2_ports[1]" = "USB2_PORT_EMPTY"
+			# Disable M.2 WWAN
+			register "usb2_ports[2]" = "USB2_PORT_EMPTY"
+			# Improve the USB2 Port4 eye diagram
+			register "usb2_ports[3]" = "{
+				.enable = 1,
+				.ocpin = OC_SKIP,
+				.tx_bias = USB2_BIAS_39P35MV,
+				.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
+				.pre_emp_bias = USB2_BIAS_39P35MV,
+				.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
+				.type_c = 1,
 			}"
-
+			# Lower camera driving
+			register "usb2_ports[4]" = "{
+				.enable = 1,
+				.ocpin = OC_SKIP,
+				.tx_bias = USB2_BIAS_0MV,
+				.tx_emp_enable = USB2_EMP_OFF,
+				.pre_emp_bias = USB2_BIAS_0MV,
+				.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
+			}"
+			# Type-A / Type-C C0
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)"
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
 					chip drivers/usb/acpi
diff --git a/src/mainboard/google/volteer/variants/elemi/overridetree.cb b/src/mainboard/google/volteer/variants/elemi/overridetree.cb
index 7fa38bf6fd..b3bbc7ef07 100644
--- a/src/mainboard/google/volteer/variants/elemi/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/elemi/overridetree.cb
@@ -131,11 +131,9 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[2] = USB2_PORT_EMPTY,			// Disable M.2 WWAN
-				[3] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C1
-				[8] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C0
-			}"
+			register "usb2_ports[2]" = "USB2_PORT_EMPTY"		# Disable M.2 WWAN
+			register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C1
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C0
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
diff --git a/src/mainboard/google/volteer/variants/halvor/overridetree.cb b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
index 589dfaf25a..46a9014ed1 100644
--- a/src/mainboard/google/volteer/variants/halvor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
@@ -122,14 +122,11 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[1] = USB2_PORT_MID(OC_SKIP),	// Type-A / Type-C Port 0
-				[3] = USB2_PORT_MID(OC_SKIP),	// Type-A / Type-C Port 1
-				[4] = USB2_PORT_MID(OC_SKIP),	// Front Camera
-				[5] = USB2_PORT_MID(OC_SKIP),	// Type-A / Type-C Port 2
-				[9] = USB2_PORT_MID(OC_SKIP),	// Reserve for CNVi BT
-			}"
-
+			register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A / Type-C Port 0
+			register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A / Type-C Port 1
+			register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)"	# Front Camera
+			register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A / Type-C Port 2
+			register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"	# Reserve for CNVi BT
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
 					chip drivers/usb/acpi
diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb
index 2229af7d1d..b59b72a1e3 100644
--- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb
@@ -318,13 +318,11 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[0] = USB2_PORT_MID(OC_SKIP),		// Type-A Port A0
-				[3] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C1
-				[4] = USB2_PORT_MID(OC_SKIP),		// M.2 Camera
-				[8] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C0
-				[9] = USB2_PORT_MID(OC_SKIP),		// M.2 Bluetooth
-			}"
+			register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A Port A0
+			register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C1
+			register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 Camera
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C0
+			register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 Bluetooth
 
 			register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)"	# USB3/2 Type A port A0
 
diff --git a/src/mainboard/google/volteer/variants/malefor/overridetree.cb b/src/mainboard/google/volteer/variants/malefor/overridetree.cb
index 1942657858..23e4cfc3be 100644
--- a/src/mainboard/google/volteer/variants/malefor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/malefor/overridetree.cb
@@ -104,16 +104,13 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[0] = USB2_PORT_MID(OC_SKIP),	// Type-A Port A0
-				[3] = USB2_PORT_MID(OC_SKIP),	// Type-A / Type-C C1
-				[4] = USB2_PORT_MID(OC_SKIP),	// M.2 Camera
-				[8] = USB2_PORT_MID(OC_SKIP),	// Type-A / Type-C C0
-				[9] = USB2_PORT_MID(OC_SKIP),	// M.2 Bluetooth
-			}"
+			register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A Port A0
+			register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A / Type-C C1
+			register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 Camera
+			register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A / Type-C C0
+			register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"	# M.2 Bluetooth
 
 			register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)"	# USB3/2 Type A port A0
-
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
 					chip drivers/usb/acpi
diff --git a/src/mainboard/google/volteer/variants/terrador/overridetree.cb b/src/mainboard/google/volteer/variants/terrador/overridetree.cb
index 4b814ebf2d..ff99716d5a 100644
--- a/src/mainboard/google/volteer/variants/terrador/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/terrador/overridetree.cb
@@ -186,18 +186,14 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[0] = USB2_PORT_TYPE_C(OC0),	// Type-A / Type-C Port 0
-				[1] = USB2_PORT_TYPE_C(OC1),	// Type-A / Type-C Port 1
-				[2] = USB2_PORT_TYPE_C(OC1),	// Type-A / Type-C Port 1
-				[3] = USB2_PORT_MID(OC_SKIP),	// Front Camera
-				[4] = USB2_PORT_TYPE_C(OC0),	// Type-A / Type-C Port 0
-			}"
+		register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-A / Type-C Port 0
+		register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)"	# Type-A / Type-C Port 1
+		register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC1)"	# Type-A / Type-C Port 1
+		register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"	# Front Camera
+		register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC0)"	# Type-A / Type-C Port 0
 
-			register "usb3_ports" = "{
-				[0] = USB3_PORT_DEFAULT(OC0),	// Type-A / Type-C Port 0
-				[1] = USB3_PORT_DEFAULT(OC1),	// Type-A / Type-C Port 1
-			}"
+		register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# Type-A / Type-C Port 0
+		register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)"	# Type-A / Type-C Port 1
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
diff --git a/src/mainboard/google/volteer/variants/todor/overridetree.cb b/src/mainboard/google/volteer/variants/todor/overridetree.cb
index c511fed556..e5ebdd1576 100644
--- a/src/mainboard/google/volteer/variants/todor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/todor/overridetree.cb
@@ -12,18 +12,14 @@ chip soc/intel/tigerlake
 
 	device domain 0 on
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[0] = USB2_PORT_TYPE_C(OC0),	// Type-A / Type-C Port 0
-				[1] = USB2_PORT_TYPE_C(OC1),	// Type-A / Type-C Port 1
-				[2] = USB2_PORT_TYPE_C(OC1),	// Type-A / Type-C Port 1
-				[3] = USB2_PORT_MID(OC_SKIP),	// Front Camera
-				[4] = USB2_PORT_TYPE_C(OC0),	// Type-A / Type-C Port 0
-			}"
+			register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-A / Type-C Port 0
+			register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)"	# Type-A / Type-C Port 1
+			register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC1)"	# Type-A / Type-C Port 1
+			register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"	# Front Camera
+			register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC0)"	# Type-A / Type-C Port 0
 
-			register "usb3_ports" = "{
-				[0] = USB3_PORT_DEFAULT(OC0),	// Type-A / Type-C Port 0
-				[1] = USB3_PORT_DEFAULT(OC1),	// Type-A / Type-C Port 1
-			}"
+			register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# Type-A / Type-C Port 0
+			register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)"	# Type-A / Type-C Port 1
 		end
 		device ref dptf on
 			chip drivers/intel/dptf
diff --git a/src/mainboard/google/volteer/variants/voema/overridetree.cb b/src/mainboard/google/volteer/variants/voema/overridetree.cb
index d895b1a938..afc67c618a 100644
--- a/src/mainboard/google/volteer/variants/voema/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/voema/overridetree.cb
@@ -156,10 +156,8 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[2] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C Port 1
-				[4] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C Port 0
-			}"
+			register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C Port 1
+			register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C Port 0
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
diff --git a/src/mainboard/google/volteer/variants/volet/overridetree.cb b/src/mainboard/google/volteer/variants/volet/overridetree.cb
index 7125f40578..5ca8a87ae2 100644
--- a/src/mainboard/google/volteer/variants/volet/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/volet/overridetree.cb
@@ -182,10 +182,8 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[3] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C Cl
-				[8] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C0
-			}"
+			register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C Cl
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C0
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on
diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb
index 836753349c..6c237a9899 100644
--- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb
@@ -277,10 +277,8 @@ chip soc/intel/tigerlake
 			end
 		end
 		device ref south_xhci on
-			register "usb2_ports" = "{
-				[3] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C Cl
-				[8] = USB2_PORT_TYPE_C(OC_SKIP),	// Type-A / Type-C C0
-			}"
+			register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C Cl
+			register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-A / Type-C C0
 
 			chip drivers/usb/acpi
 				device ref xhci_root_hub on