diff options
| author | Hao Chou <hao_chou@pegatron.corp-partner.google.com> | 2021-04-01 14:46:00 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-21 09:19:38 +0000 |
| commit | a50f190fd4f9392f85bbeee53114cb054ad047cc (patch) | |
| tree | bbe0b7e32d74a09c682496c053d74707195e4eef /src/mainboard/google/volteer/variants | |
| parent | a37c8021a6963d3ea8bf89e33323ed6acadb23f9 (diff) | |
mb/google/volteer/variants/copano: Modify touch controller power sequence
Based on the measurement, adjust the delay time between the main power rail and reset signal to 7ms in order to match the spec. of touch controller, eKTH7918U.
BUG=b:184126265
BRANCH=firmware-volteer-13672.B
TEST=build test firmware and verified by EE team.
Change-Id: Iea84046c1b1f3fe6ab8bb89d86d00b1e89325f71
Signed-off-by: Hao Chou <hao_chou@pegatron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Reviewed-by: Wayne3 Wang <wayne3_wang@pegatron.corp-partner.google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/volteer/variants')
| -rw-r--r-- | src/mainboard/google/volteer/variants/copano/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/copano/overridetree.cb b/src/mainboard/google/volteer/variants/copano/overridetree.cb index b0a108e5c5..ec624d3f7a 100644 --- a/src/mainboard/google/volteer/variants/copano/overridetree.cb +++ b/src/mainboard/google/volteer/variants/copano/overridetree.cb @@ -142,6 +142,7 @@ chip soc/intel/tigerlake register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F16)" register "generic.reset_delay_ms" = "20" + register "generic.enable_delay_ms" = "7" register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" register "hid_desc_reg_offset" = "0x01" |