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authorJes Klinke <jbk@google.com>2020-12-01 15:21:38 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-12-08 16:59:37 +0000
commit6e929acb73fd861c45f2b013a0d64f77b247b124 (patch)
treec123cd7eeebb9281a59dd00d479aadb1fac80a0f /src/mainboard/google/volteer/variants/baseboard
parenta97fb7f9604ea9d90865c577d37376b82c915fb9 (diff)
mb/google/volteer: ACPI nodes for volteer2_ti50
Unique among the Volteer devices, the volteer2_ti50 variant connects to the TPM via I2C. This CL introduces the proper devicestree declarations for the Linux kernel to recognize that. overridetree.cb is shared between "sub"-variants volteer2 and volteer2_ti50, so both will have two TPM nodes, the I2C being disabled by default. The odd _ti50 variant then has code in variant.c to enable the I2C node and disable the SPI node. BUG=b:173461736 TEST=abuild -t GOOGLE_VOLTEER2{_TI50,} -c max -x Change-Id: I5576a595bbabc34c62b768f8b3439e35ff6bcf7b Signed-off-by: Jes Bodi Klinke <jbk@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48223 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/baseboard')
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
index 84081983c3..4d5dc87cb9 100644
--- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
@@ -21,4 +21,7 @@ const struct cros_gpio *variant_cros_gpios(size_t *num);
const struct ddr_memory_cfg *variant_memory_params(void);
int variant_memory_sku(void);
+/* Modify devictree settings during ramstage. */
+void variant_devtree_update(void);
+
#endif /* __BASEBOARD_VARIANTS_H__ */