diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-08-21 13:43:59 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-08-25 18:41:57 +0000 |
| commit | 14025bd5cc0fdfc45be6a767c0c424dcf56b4d08 (patch) | |
| tree | ab4618468dde4b38162750620d919e7dc081d87a /src/mainboard/google/volteer/mainboard.c | |
| parent | eb7a1dd80e72ef435c71650284f355f7f57ebe72 (diff) | |
mb/google/volteer: Enable CSE Board Reset Override
This will ensure that the cold reset is performed when CSE Lite jumps
from RO to RW.
BUG=b:162977697
TEST=Verify CSE reset is cold (sits in S5 for PCH Min Slp Duration time)
Change-Id: Ib1173e219ba46ee3275824220c8cf790b1d497fa
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/volteer/mainboard.c')
| -rw-r--r-- | src/mainboard/google/volteer/mainboard.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c index a926673ad7..5bece68c1c 100644 --- a/src/mainboard/google/volteer/mainboard.c +++ b/src/mainboard/google/volteer/mainboard.c @@ -5,19 +5,10 @@ #include <baseboard/variants.h> #include <device/device.h> #include <ec/ec.h> -#include <ec/google/chromeec/ec.h> -#include <halt.h> -#include <intelblocks/cse.h> #include <soc/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> #include <variant/gpio.h> -void cse_board_reset(void) -{ - if (!google_chromeec_ap_reset()) - halt(); -} - static void mainboard_init(struct device *dev) { mainboard_ec_init(); |