diff options
author | Nick Vaccaro <nvaccaro@google.com> | 2020-01-28 18:43:28 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-09 19:26:23 +0000 |
commit | f978191b64bf0b4a512eb2872e044f1e030b7c8f (patch) | |
tree | faebc437633d7d186c2b0fa0c4d0f8c3ddd1dbe2 /src/mainboard/google/volteer/chromeos.c | |
parent | 7bac50e82428b3e94c08787a366d8230ec16c046 (diff) |
mb/google/volteer: add volteer mainboard initial support
Created a new Google baseboard named volteer from scratch.
BUG=b:142961277
BRANCH=master
TEST="emerge-volteer coreboot" compiles successfully.
Change-Id: I03a13f3df4e819ab9cf63ad69867c807d2a1b651
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38620
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/volteer/chromeos.c')
-rw-r--r-- | src/mainboard/google/volteer/chromeos.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/chromeos.c b/src/mainboard/google/volteer/chromeos.c new file mode 100644 index 0000000000..eca7e20652 --- /dev/null +++ b/src/mainboard/google/volteer/chromeos.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2020 The coreboot project Authors. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <baseboard/variants.h> +#include <boot/coreboot_tables.h> +#include <gpio.h> +#include <variant/gpio.h> +#include <vendorcode/google/chromeos/chromeos.h> + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + struct lb_gpio chromeos_gpios[] = { + {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, + {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, + {-1, ACTIVE_HIGH, 0, "power"}, + {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, + {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), + "EC in RW"}, + }; + lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); +} + +int get_write_protect_state(void) +{ + /* Read PCH_WP GPIO. */ + return gpio_get(GPIO_PCH_WP); +} + +void mainboard_chromeos_acpi_generate(void) +{ + const struct cros_gpio *gpios; + size_t num; + + gpios = variant_cros_gpios(&num); + chromeos_acpi_gpio_generate(gpios, num); +} |