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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-08-25 13:55:53 +0200 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-09-06 14:57:06 +0000 |
| commit | e83d30bb5a240757b2e0a712e012c9fe6ab44f95 (patch) | |
| tree | 111b98e276b27d1f8b827bc085bcfa46357e7efc /src/mainboard/google/volteer/Kconfig | |
| parent | f0eb1925e4f3f083cd20e42dd35f65696341ce01 (diff) | |
mb: remove duplicated Make code for spd.bin generation
Drop duplicated code for spd.bin generation that is provided globally
in lib/Makefile.inc.
For all affected boards it has been verified that the output binary
functionally matches the original one. The changed execution order of
Make instructions influenced the cbfs file order. Hence, the rom images
can't be compared directly.
Thus, the output files of the two timeless abuild runs have been compared.
Further, it was verified that the final files in cbfs stay identical, by
comparing the extracted cbfs of each board.
The boards (possibly) needing modification could be found with something
like this (with false positives, though):
find src/mainboard -name Makefile.inc | \
xargs egrep 'SPD_BIN|SPD_DEPS' | cut -d: -f1 | sort -u
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: Icd3ac0fd6c901228554115c6350d88bb49874587
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/google/volteer/Kconfig')
| -rw-r--r-- | src/mainboard/google/volteer/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 4867feaabe..dda2f4e933 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -27,6 +27,7 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER select MAINBOARD_HAS_TPM2 select PCIEXP_HOTPLUG select SOC_INTEL_TIGERLAKE + select GENERIC_SPD_BIN if BOARD_GOOGLE_BASEBOARD_VOLTEER |