diff options
author | David Hendricks <dhendrix@chromium.org> | 2015-05-13 14:29:23 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-06-05 18:56:37 +0200 |
commit | 5b6645b78dedcc279acf524dfc671a82d88cb00c (patch) | |
tree | 1ad8cec58112740ed012b3d83756e18390687c5e /src/mainboard/google/veyron_romy/mainboard.c | |
parent | 7a8a4ab1d88a411ee0dad23318f98b4f29fd2f60 (diff) |
google/veyron_romy: Add new mainboard
This simply copies veyron_brain to veyron_romy and makes the
minimal set of changes (s/brain/romy) to make it compile. The
follow-up patch will take into account board differences.
BUG=none
BRANCH=none
TEST="emerge-veyron_romy coreboot" doesn't fail
Change-Id: Ice1bc012bddd6c51b43944747e0df3ffa34207fa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0ab849178b69cf2323f126e503bd61080048240a
Original-Change-Id: I0516ce94fd3c6a38170fae221a070f503ccfaf0f
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/271345
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10407
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/mainboard/google/veyron_romy/mainboard.c')
-rw-r--r-- | src/mainboard/google/veyron_romy/mainboard.c | 117 |
1 files changed, 117 insertions, 0 deletions
diff --git a/src/mainboard/google/veyron_romy/mainboard.c b/src/mainboard/google/veyron_romy/mainboard.c new file mode 100644 index 0000000000..2f61d01dec --- /dev/null +++ b/src/mainboard/google/veyron_romy/mainboard.c @@ -0,0 +1,117 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <arch/cache.h> +#include <arch/io.h> +#include <boot/coreboot_tables.h> +#include <console/console.h> +#include <delay.h> +#include <device/device.h> +#include <device/i2c.h> +#include <edid.h> +#include <elog.h> +#include <gpio.h> +#include <soc/display.h> +#include <soc/grf.h> +#include <soc/soc.h> +#include <soc/pmu.h> +#include <soc/clock.h> +#include <soc/rk808.h> +#include <soc/spi.h> +#include <soc/i2c.h> +#include <symbols.h> +#include <vbe.h> +#include <vendorcode/google/chromeos/chromeos.h> + +#include "board.h" + +static void configure_usb(void) +{ + gpio_output(GPIO(0, B, 4), 1); /* USBOTG_PWREN_H */ +} + +static void configure_emmc(void) +{ + write32(&rk3288_grf->iomux_emmcdata, IOMUX_EMMCDATA); + write32(&rk3288_grf->iomux_emmcpwren, IOMUX_EMMCPWREN); + write32(&rk3288_grf->iomux_emmccmd, IOMUX_EMMCCMD); + + gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */ +} + +static void configure_codec(void) +{ + write32(&rk3288_grf->iomux_i2c2, IOMUX_I2C2); /* CODEC I2C */ + i2c_init(2, 400*KHz); /* CODEC I2C */ + + write32(&rk3288_grf->iomux_i2s, IOMUX_I2S); + write32(&rk3288_grf->iomux_i2sclk, IOMUX_I2SCLK); + + rk808_configure_ldo(6, 1800); /* VCC18_CODEC */ + + /* AUDIO IO domain 1.8V voltage selection */ + write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 6)); + rkclk_configure_i2s(12288000); +} + +static void configure_vop(void) +{ + write32(&rk3288_grf->iomux_lcdc, IOMUX_LCDC); + + /* lcdc(vop) iodomain select 1.8V */ + write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 0)); + + rk808_configure_switch(2, 1); /* VCC18_LCD (HDMI_AVDD_1V8) */ + rk808_configure_ldo(7, 1000); /* VDD10_LCD (HDMI_AVDD_1V0) */ + rk808_configure_switch(1, 1); /* VCC33_LCD */ +} + +static void mainboard_init(device_t dev) +{ + gpio_output(GPIO_RESET, 0); + + configure_usb(); + configure_emmc(); + configure_codec(); + configure_vop(); + + elog_init(); + elog_add_watchdog_reset(); + elog_add_boot_reason(); +} + +static void mainboard_enable(device_t dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; + +void lb_board(struct lb_header *header) +{ + struct lb_range *dma; + + dma = (struct lb_range *)lb_new_record(header); + dma->tag = LB_TAB_DMA; + dma->size = sizeof(*dma); + dma->range_start = (uintptr_t)_dma_coherent; + dma->range_size = _dma_coherent_size; +} |