google/veyron_romy: Add new mainboard

This simply copies veyron_brain to veyron_romy and makes the
minimal set of changes (s/brain/romy) to make it compile. The
follow-up patch will take into account board differences.

BUG=none
BRANCH=none
TEST="emerge-veyron_romy coreboot" doesn't fail

Change-Id: Ice1bc012bddd6c51b43944747e0df3ffa34207fa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0ab849178b69cf2323f126e503bd61080048240a
Original-Change-Id: I0516ce94fd3c6a38170fae221a070f503ccfaf0f
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/271345
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10407
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>

1 files changed, 80 insertions, 0 deletions

diff --git a/src/mainboard/google/veyron_romy/Kconfig b/src/mainboard/google/veyron_romy/Kconfig
new file mode 100644
index 0000000000..f96a3e9686
--- /dev/null
+++ b/src/mainboard/google/veyron_romy/Kconfig
@@ -0,0 +1,80 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Rockchip Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc.
+##
+
+if BOARD_GOOGLE_VEYRON_ROMY
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select BOARD_ID_AUTO
+	select BOARD_ROMSIZE_KB_4096
+	select COMMON_CBFS_SPI_WRAPPER
+	select HAVE_HARD_RESET
+	select MAINBOARD_DO_NATIVE_VGA_INIT
+	select MAINBOARD_HAS_CHROMEOS
+	select RAM_CODE_SUPPORT
+	select RETURN_FROM_VERSTAGE
+	select SOC_ROCKCHIP_RK3288
+	select SPI_FLASH
+	select SPI_FLASH_GIGADEVICE
+	select SPI_FLASH_WINBOND
+	select VIRTUAL_DEV_SWITCH
+	select CHROMEOS_VBNV_FLASH
+
+config MAINBOARD_DIR
+	string
+	default google/veyron_romy
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Veyron_Romy"
+
+config MAINBOARD_VENDOR
+	string
+	default "Google"
+
+config BOOT_MEDIA_SPI_BUS
+	int
+	default 2
+
+config DRIVER_TPM_I2C_BUS
+	hex
+	default 0x1
+
+config DRIVER_TPM_I2C_ADDR
+	hex
+	default 0x20
+
+config CONSOLE_SERIAL_UART_ADDRESS
+	hex
+	depends on DRIVERS_UART
+	default 0xFF690000
+
+# FIXME(dhendrix): This is a gross hack intended to get us past
+# display init which currently hangs the machine. It will be removed
+# once we've re-factored the display init code to properly handle
+# various types of displays.
+config SKIP_DISPLAY_INIT_HACK
+	int
+	default 1
+
+config PMIC_BUS
+	int
+	default 0
+
+endif #  BOARD_GOOGLE_VEYRON_ROMY