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authorNico Huber <nico.h@gmx.de>2020-09-24 23:33:34 +0200
committerNico Huber <nico.h@gmx.de>2020-10-30 21:34:18 +0000
commit1fa72d5fe1d2ac41036c08355c760fb576899347 (patch)
treee6e135c24eae9b0a58417dc5e5099f72545f5488 /src/mainboard/google/veyron_rialto
parent8661fe220d92cedbb5eb7956d74b764670d354f3 (diff)
x86: Add a minimal example SoC along with a board
The min86 example SoC code along with the example mainboard should serve as a minimal example how a buildable x86 SoC code base can look like. This can serve, for instance, as a basis to add new SoCs to coreboot. Starting with a buildable commit should help with the review of the actual code, and also avoid any regressions when common coreboot code changes. As the example code itself is build-tested, it should advance with coreboot and can't rot like documentation might. It also serves as a check what APIs need to be implemented with the default Kconfig settings. Change-Id: Id76ab15fe77ae3e405c43f9c8677694f178be112 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45710 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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