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authorAaron Durbin <adurbin@chromium.org>2015-04-22 10:48:01 -0500
committerPatrick Georgi <pgeorgi@google.com>2015-04-28 16:10:18 +0200
commitbe3e0a04b5ec01ff71e9fab61a136b858dfdaf9c (patch)
tree4aac9b94ae47afece191fbf378ec625232990569 /src/mainboard/google/veyron_rialto
parent1124cec59a2c705a4ef3740dbdf0f68113602d31 (diff)
boards: remove VBOOT_(REFCODE|RAMSTAGE|ROMSTAGE)_INDEX
These options will need to just be selected in within the .config files. There's not need in duplicating all these options. Change-Id: I7b670bc59a3b35e39eee4faecaf4aa779d47a3bb Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9959 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google/veyron_rialto')
-rw-r--r--src/mainboard/google/veyron_rialto/Kconfig11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig
index 597dd19634..dc7d0459ad 100644
--- a/src/mainboard/google/veyron_rialto/Kconfig
+++ b/src/mainboard/google/veyron_rialto/Kconfig
@@ -48,17 +48,6 @@ config MAINBOARD_VENDOR
string
default "Google"
-# The 'ecrwhash' is removed from FMAP on Rialto, since we don't have EC.
-# As a result, we have to hack RAMSTAGE and ROMSTAGE index until there are
-# better approaches for vboot2 to find right index.
-config VBOOT_RAMSTAGE_INDEX
- hex
- default 0x2
-
-config VBOOT_ROMSTAGE_INDEX
- hex
- default 0x1
-
config BOOT_MEDIA_SPI_BUS
int
default 2