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| author | Angel Pons <th3fanbus@gmail.com> | 2020-06-11 13:28:03 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-06-12 09:37:47 +0000 |
| commit | 22aeed307de770ac4d6cc0cb151a935a8840b10c (patch) | |
| tree | e74ec4cc3f3c7f78e60e328669eaa6f3163b9eb2 /src/mainboard/google/veyron_rialto | |
| parent | 304925714d6ba6f8e7ba68d33475fb1ae58f0390 (diff) | |
nb/intel/i945/rcven.c: Correct comment
The offset between registers has to be between different channels.
Change-Id: Ic6d959c31c78073a3ecbf7a17dfb73ac36340599
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/mainboard/google/veyron_rialto')
0 files changed, 0 insertions, 0 deletions