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| author | Marco Chen <marcochen@chromium.org> | 2019-07-10 13:13:45 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-16 16:34:40 +0000 |
| commit | af62855ac4aa0fde702b94769f14966609bedb20 (patch) | |
| tree | 8f61f91955350c66a441cdb87635fed19f1baba5 /src/mainboard/google/veyron_rialto | |
| parent | 9b0f93347249cf260fe7db0072131277b846cc1a (diff) | |
mb/google/octopus/variants/garg: support LTE power sequence
GPIOs related to power sequnce are
GPIO_67 - EN_PP3300
GPIO_117 - FULL_CARD_POWER_ON_OFF
GPIO_161 - PLT_RST_LTE_L
1. Power on: GPIO_67 -> 0ms -> GPIO_117 -> 30ms -> GPIO_161
2. Power off: GPIO_161 -> 30ms -> GPIO_117 -> 100ms -> GPIO_67
3. Power reset:
- keep GPIO_67 and GPIO_117 high and
- pull down GPIO_161 for 30ms then release it.
BUG=b:137033609
BRANCH=octopus
TEST=build image and verify on the DUT with LTE DB.
Change-Id: I7bf6fee087c885c22363b44aa98aa61f91be90b4
Signed-off-by: Marco Chen <marcochen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/veyron_rialto')
0 files changed, 0 insertions, 0 deletions