diff options
| author | jinkun.hong <jinkun.hong@rock-chips.com> | 2015-01-07 08:57:48 +0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-15 22:05:20 +0200 |
| commit | 692a2c008304b76e09d6bb6ead0002ffdb9a624a (patch) | |
| tree | c53d1c3d6262494e200be8c8d5381a0bd46adeb9 /src/mainboard/google/veyron_rialto/sdram_inf | |
| parent | 6114c99d129710fece8d6ee473e861022b58b438 (diff) | |
veyron: Add veyron_rialto board
Derived from of veyron_brain with new memory configuration.
BUG=chrome-os-partner:35072
TEST=built and boot on rialto-rev0 boards.
BRANCH=veyron
Change-Id: I2c6f74d231e39de76ef2399fdb20efae977b34fa
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 17d66e5f58562427badd6973ebb053f58573c040
Original-Change-Id: I8626ff5da8098ca120481b8cda0c6703f806711e
Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com>
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/238946
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Trybot-Ready: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9649
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google/veyron_rialto/sdram_inf')
| -rw-r--r-- | src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc | 77 | ||||
| -rw-r--r-- | src/mainboard/google/veyron_rialto/sdram_inf/sdram-unused.inc | 3 |
2 files changed, 80 insertions, 0 deletions
diff --git a/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc new file mode 100644 index 0000000000..53ea142f09 --- /dev/null +++ b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc @@ -0,0 +1,77 @@ +{ + { + { + .rank = 0x2, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xE, + .cs1_row = 0xE + }, + { + .rank = 0x0, + .col = 0x0, + .bk = 0x0, + .bw = 0x0, + .dbw = 0x0, + .row_3_4 = 0x0, + .cs0_row = 0x0, + .cs1_row = 0x0 + } + }, + { + .togcnt1u = 0x215, + .tinit = 0xC8, + .trsth = 0x0, + .togcnt100n = 0x35, + .trefi = 0x26, + .tmrd = 0x2, + .trfc = 0x70, + .trp = 0x2000D, + .trtw = 0x6, + .tal = 0x0, + .tcl = 0x8, + .tcwl = 0x4, + .tras = 0x17, + .trc = 0x24, + .trcd = 0xD, + .trrd = 0x6, + .trtp = 0x4, + .twr = 0x8, + .twtr = 0x4, + .texsr = 0x76, + .txp = 0x4, + .txpdll = 0x0, + .tzqcs = 0x30, + .tzqcsi = 0x0, + .tdqs = 0x1, + .tcksre = 0x2, + .tcksrx = 0x2, + .tcke = 0x4, + .tmod = 0x0, + .trstl = 0x0, + .tzqcl = 0xC0, + .tmrr = 0x4, + .tckesr = 0x8, + .tdpd = 0x1F4 + }, + { + .dtpr0 = 0x48D7DD93, + .dtpr1 = 0x187008D8, + .dtpr2 = 0x121076, + .mr[0] = 0x0, + .mr[1] = 0xC3, + .mr[2] = 0x6, + .mr[3] = 0x1 + }, + .noc_timing = 0x20D266A4, + .noc_activate = 0x5B6, + .ddrconfig = 2, + .ddr_freq = 533*MHz, + .dramtype = LPDDR3, + .num_channels = 1, + .stride = 22, + .odt = 1 +}, diff --git a/src/mainboard/google/veyron_rialto/sdram_inf/sdram-unused.inc b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-unused.inc new file mode 100644 index 0000000000..06498f7f14 --- /dev/null +++ b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-unused.inc @@ -0,0 +1,3 @@ +{ + .dramtype= UNUSED +},
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