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authorDavid Hendricks <dhendrix@chromium.org>2015-01-12 13:13:30 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-15 16:46:37 +0200
commit4d244214ce56dc89abd74a5d0ee45e77ca61c279 (patch)
tree0a92a93586675b4ce3fd31edd193a212f7caf9f2 /src/mainboard/google/veyron_brain
parent33df49519eb19556497bb3fdf442b058be324895 (diff)
veyron_*: Move PMIC_BUS to a Kconfig variable
This moves PMIC_BUS from each mainboard's board.h file to a per- mainboard Kconfig variable. To prevent humans from forgetting to set a valid value, an invalid default is set in the rk3288 Kconfig and checked in rk808.c so that compilation will fail if the mainboard Kconfig does not override it. Originally, PMIC_BUS was only used by mainboard code as an argument to RK808 PMIC functions. To conform to the generic RTC API, however, the RK808 code needs to have the bus number globally defined somewhere since the rtc_get() and rtc_set() functions don't take any args. Since CONFIG_PMIC_BUS is globally visible, we no longer need to pass bus number to the PMIC functions. BUG=chrome-os-partner:34436 BRANCH=none TEST=built and booted on Pinky Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I73783878e507b2e7b1526dd2f81cfbdf8f1e2a55 Reviewed-on: https://chromium-review.googlesource.com/240203 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9642 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/google/veyron_brain')
-rw-r--r--src/mainboard/google/veyron_brain/Kconfig4
-rw-r--r--src/mainboard/google/veyron_brain/board.h2
-rw-r--r--src/mainboard/google/veyron_brain/bootblock.c7
-rw-r--r--src/mainboard/google/veyron_brain/mainboard.c8
-rw-r--r--src/mainboard/google/veyron_brain/romstage.c4
5 files changed, 14 insertions, 11 deletions
diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig
index b4d1a0773a..94f1a4b0d6 100644
--- a/src/mainboard/google/veyron_brain/Kconfig
+++ b/src/mainboard/google/veyron_brain/Kconfig
@@ -73,4 +73,8 @@ config CONSOLE_SERIAL_UART_ADDRESS
depends on CONSOLE_SERIAL_UART
default 0xFF690000
+config PMIC_BUS
+ int
+ default 0
+
endif # BOARD_GOOGLE_VEYRON_BRAIN
diff --git a/src/mainboard/google/veyron_brain/board.h b/src/mainboard/google/veyron_brain/board.h
index c9583cf30c..96159d41e8 100644
--- a/src/mainboard/google/veyron_brain/board.h
+++ b/src/mainboard/google/veyron_brain/board.h
@@ -23,8 +23,6 @@
#include <boardid.h>
#include <gpio.h>
-#define PMIC_BUS 0
-
#define GPIO_RESET GPIO(0, B, 5)
/* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
diff --git a/src/mainboard/google/veyron_brain/bootblock.c b/src/mainboard/google/veyron_brain/bootblock.c
index af353f89fa..610c23e4de 100644
--- a/src/mainboard/google/veyron_brain/bootblock.c
+++ b/src/mainboard/google/veyron_brain/bootblock.c
@@ -50,12 +50,13 @@ void bootblock_mainboard_init(void)
/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
- i2c_init(PMIC_BUS, 400*KHz);
+ assert(CONFIG_PMIC_BUS == 0); /* must correspond with IOMUX */
+ i2c_init(CONFIG_PMIC_BUS, 400*KHz);
/* Slowly raise to max CPU voltage to prevent overshoot */
- rk808_configure_buck(PMIC_BUS, 1, 1200);
+ rk808_configure_buck(1, 1200);
udelay(175);/* Must wait for voltage to stabilize,2mV/us */
- rk808_configure_buck(PMIC_BUS, 1, 1400);
+ rk808_configure_buck(1, 1400);
udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu();
diff --git a/src/mainboard/google/veyron_brain/mainboard.c b/src/mainboard/google/veyron_brain/mainboard.c
index d8719c06b4..13990d9493 100644
--- a/src/mainboard/google/veyron_brain/mainboard.c
+++ b/src/mainboard/google/veyron_brain/mainboard.c
@@ -63,7 +63,7 @@ static void configure_codec(void)
writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
- rk808_configure_ldo(PMIC_BUS, 6, 1800); /* VCC18_CODEC */
+ rk808_configure_ldo(6, 1800); /* VCC18_CODEC */
/* AUDIO IO domain 1.8V voltage selection */
writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel);
@@ -77,9 +77,9 @@ static void configure_vop(void)
/* lcdc(vop) iodomain select 1.8V */
writel(RK_SETBITS(1 << 0), &rk3288_grf->io_vsel);
- rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD (HDMI_AVDD_1V8) */
- rk808_configure_ldo(PMIC_BUS, 7, 1000); /* VDD10_LCD (HDMI_AVDD_1V0) */
- rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */
+ rk808_configure_switch(2, 1); /* VCC18_LCD (HDMI_AVDD_1V8) */
+ rk808_configure_ldo(7, 1000); /* VDD10_LCD (HDMI_AVDD_1V0) */
+ rk808_configure_switch(1, 1); /* VCC33_LCD */
}
static void mainboard_init(device_t dev)
diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c
index 995609afc3..1eed268fa7 100644
--- a/src/mainboard/google/veyron_brain/romstage.c
+++ b/src/mainboard/google/veyron_brain/romstage.c
@@ -79,8 +79,8 @@ static void configure_l2ctlr(void)
static void sdmmc_power_off(void)
{
- rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
- rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+ rk808_configure_ldo(4, 0); /* VCCIO_SD */
+ rk808_configure_ldo(5, 0); /* VCC33_SD */
}
void main(void)