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authorDuncan Laurie <dlaurie@chromium.org>2018-01-29 12:00:47 -0800
committerMartin Roth <martinroth@google.com>2018-02-06 15:19:25 +0000
commit74ea48efb30f6f72a7a46b352170455c0a33391d (patch)
tree4c2ba7cbc48c0f30233ad2efe6e9eca6d4a91fa0 /src/mainboard/google/veyron
parentf5e37751f3bac3c5b7f358792a54cd4e435bccbe (diff)
soc/intel/skylake: Add devicetree variable for PCIe HotPlug
Add a variable to fill out the FSP UPD variable for PCIe HotPlug, which allows a mainboard to enable HotPlug on individual root ports. BUG=b:72417777 TEST=enable HotPlug on Eve Root Port 0 (WiFi) and check in linux that it is identified as a HotPlug capable root port. Change-Id: I6b1f525e41909a3f81984806c4ef20239032c8d6 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/23511 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/veyron')
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