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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-05-10 04:37:56 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-02 23:36:08 +0100 |
| commit | 502d457bf9c43e7b100007ca66fd8d61f49ffa61 (patch) | |
| tree | dd4e8fee20e380d316c8ae14ced60dc1889c7a93 /src/mainboard/google/veyron/reset.c | |
| parent | 2a83935d9f50e3059e7747338a700c2fceb1731a (diff) | |
mainboard/asus/kgpe-d16: Set DDR3 memory voltage based on SPD data
Change-Id: I21777283ce0fd3c607951204a63ff67dc656c8cc
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11956
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/veyron/reset.c')
0 files changed, 0 insertions, 0 deletions