diff options
author | Matt DeVillier <matt.devillier@gmail.com> | 2015-12-25 01:15:41 -0600 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-01-21 02:47:29 +0100 |
commit | 89683c0d2676b462be58a09c9a7df55cc1c9b57a (patch) | |
tree | 2b71c55247cca98a3f33acbe8e87f1cff896e6cc /src/mainboard/google/tidus/pei_data.c | |
parent | 5f4ee47c6c6e9ed0b49f3c39192249a7ab5ceed2 (diff) |
google/tidus: initial upstream migration
Migrate google/tidus (Lenovo ThinkCentre Chromebox) from Chromium
tree to upstream, using google/guado as a baseline.
TEST=built and booted tidus with full functionality
Change-Id: I9d7a976345566bee63226d1a44ba7d5ec137a742
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/12801
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/tidus/pei_data.c')
-rw-r--r-- | src/mainboard/google/tidus/pei_data.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/src/mainboard/google/tidus/pei_data.c b/src/mainboard/google/tidus/pei_data.c new file mode 100644 index 0000000000..7c03422553 --- /dev/null +++ b/src/mainboard/google/tidus/pei_data.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <string.h> +#include <soc/gpio.h> +#include <soc/pei_data.h> +#include <soc/pei_wrapper.h> + +void mainboard_fill_pei_data(struct pei_data *pei_data) +{ + pei_data->ec_present = 0; + + /* P0: VP8 */ + pei_data_usb2_port(pei_data, 0, 0x0064, 1, USB_OC_PIN_SKIP, + USB_PORT_MINI_PCIE); + /* P1: Port 3, USB3 */ + pei_data_usb2_port(pei_data, 1, 0x0040, 1, 0, + USB_PORT_INTERNAL); + /* P2: Port 4, USB4 */ + pei_data_usb2_port(pei_data, 2, 0x0040, 1, 1, + USB_PORT_INTERNAL); + /* P3: Mini Card */ + pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_MINI_PCIE); + /* P4: Port 1, USB1 */ + pei_data_usb2_port(pei_data, 4, 0x0040, 1, 2, + USB_PORT_INTERNAL); + /* P5: Port 2, USB2 */ + pei_data_usb2_port(pei_data, 5, 0x0040, 1, 2, + USB_PORT_INTERNAL); + /* P6: Card Reader */ + pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_INTERNAL); + /* P7: Pin Header */ + pei_data_usb2_port(pei_data, 7, 0x0040, 1, 3, + USB_PORT_INTERNAL); + + /* P1: USB1 */ + pei_data_usb3_port(pei_data, 0, 1, 2, 0); + /* P2: USB2 */ + pei_data_usb3_port(pei_data, 1, 1, 2, 0); + /* P3: USB3 */ + pei_data_usb3_port(pei_data, 2, 1, 0, 0); + /* P4: USB4 */ + pei_data_usb3_port(pei_data, 3, 1, 1, 0); +} |