aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google/tidus/mainboard.c
diff options
context:
space:
mode:
authorMatt DeVillier <matt.devillier@gmail.com>2015-12-25 01:15:41 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-01-21 02:47:29 +0100
commit89683c0d2676b462be58a09c9a7df55cc1c9b57a (patch)
tree2b71c55247cca98a3f33acbe8e87f1cff896e6cc /src/mainboard/google/tidus/mainboard.c
parent5f4ee47c6c6e9ed0b49f3c39192249a7ab5ceed2 (diff)
google/tidus: initial upstream migration
Migrate google/tidus (Lenovo ThinkCentre Chromebox) from Chromium tree to upstream, using google/guado as a baseline. TEST=built and booted tidus with full functionality Change-Id: I9d7a976345566bee63226d1a44ba7d5ec137a742 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/12801 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/tidus/mainboard.c')
-rw-r--r--src/mainboard/google/tidus/mainboard.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/src/mainboard/google/tidus/mainboard.c b/src/mainboard/google/tidus/mainboard.c
new file mode 100644
index 0000000000..f400c2fe4f
--- /dev/null
+++ b/src/mainboard/google/tidus/mainboard.c
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <types.h>
+#include <string.h>
+#include <smbios.h>
+#include <device/device.h>
+#include <device/device.h>
+#include <device/pci_def.h>
+#include <device/pci_ops.h>
+#include <console/console.h>
+#include <pc80/mc146818rtc.h>
+#include <arch/acpi.h>
+#include <arch/io.h>
+#include <arch/interrupt.h>
+#include <boot/coreboot_tables.h>
+#include "onboard.h"
+
+void mainboard_suspend_resume(void)
+{
+ /* Call SMM finalize() handlers before resume */
+ outb(0xcb, 0xb2);
+}
+
+static void mainboard_init(device_t dev)
+{
+ lan_init();
+}
+
+// mainboard_enable is executed as first thing after
+// enumerate_buses().
+
+static void mainboard_enable(device_t dev)
+{
+ dev->ops->init = mainboard_init;
+}
+
+struct chip_operations mainboard_ops = {
+ .enable_dev = mainboard_enable,
+};
+