diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-23 19:08:01 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-25 16:03:37 +0000 |
| commit | 17887d08fee6d10bc4ff8758694b88435365e5d7 (patch) | |
| tree | 03ef6c6afe204dd47c26177974b0c7d6cc60f574 /src/mainboard/google/stout | |
| parent | b14b55daafbd953d04a3bbf9a66bc7fc5ebd277f (diff) | |
mb/*/chromeos.c: Remove some ENV_RAMSTAGE and __SIMPLE_DEVICE__
Use explicit simple PCI config accessors here.
Change-Id: Ifa3814fdd7795479ca5fdbfc4deb3fe8db9805f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/stout')
| -rw-r--r-- | src/mainboard/google/stout/chromeos.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index 60c7a09249..ff247da471 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -15,6 +15,7 @@ #include <string.h> #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> @@ -26,9 +27,6 @@ #include "ec.h" #include <ec/quanta/it8518/ec.h> -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -51,7 +49,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_write_protect_state(void) { @@ -74,16 +71,14 @@ int get_lid_switch(void) */ int get_recovery_mode_switch(void) { -#ifdef __PRE_RAM__ - pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); -#else +#ifndef __PRE_RAM__ static int ec_in_rec_mode = 0; static int ec_rec_flag_good = 0; - struct device *dev = pcidev_on_root(0x1f, 0); #endif + pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); + u8 reg8 = pci_s_read_config8(dev, GEN_PMCON_3); u8 ec_status = ec_read(EC_STATUS_REG); - u8 reg8 = pci_read_config8(dev, GEN_PMCON_3); printk(BIOS_SPEW,"%s: EC status:%#x RTC_BAT: %x\n", __func__, ec_status, reg8 & RTC_BATTERY_DEAD); |