diff options
| author | Hung-Te Lin <hungte@chromium.org> | 2013-06-28 17:27:17 +0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 23:18:50 +0200 |
| commit | da7b8e4de9a690cbed00a361d282b18792c676d6 (patch) | |
| tree | 44dff03250bf7bc02261f10081b625f564df5385 /src/mainboard/google/snow | |
| parent | c0b2144f698fdf82a2402db6b6038e70b19ba984 (diff) | |
armv7/exynos: Prevent unexpected reboots in resume.
In resume path, if memory setup takes too long without setting PS_HOLD, EC watch
dog may power off or reboot the system. To prevent that, we should enable
PS_HOLD in same timing as cold boot - right before starting memory setup.
Change-Id: I5c294fa7ae015f8cff57b1fd81e5b80902647b15
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3718
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/snow')
| -rw-r--r-- | src/mainboard/google/snow/romstage.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 8c01536a32..7442f7afc2 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -43,12 +43,16 @@ #define PMIC_BUS 0 #define MMC0_GPIO_PIN (58) -static void setup_power(void) +static void setup_power(int is_resume) { int error = 0; power_init(); + if (is_resume) { + return; + } + /* Initialize I2C bus to configure PMIC. */ exynos_pinmux_i2c0(); i2c_init(0, I2C_0_SPEED, 0x00); @@ -171,10 +175,7 @@ void main(void) console_init(); - if (!is_resume) { - setup_power(); - } - + setup_power(is_resume); setup_memory(mem, is_resume); if (is_resume) { |