diff options
| author | David Hendricks <dhendrix@chromium.org> | 2013-03-12 22:00:43 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-13 23:17:08 +0100 |
| commit | 0274919bf6853b7a437025a8abf6624b824b3d91 (patch) | |
| tree | 86d61ec6a10dc765558beef09b2f4b8aa313dbc7 /src/mainboard/google/snow | |
| parent | 49ff3c50dd7c4aca145f274a3346f36a2233c7d2 (diff) | |
exynos5250/snow: enable branch prediction
This enables branch prediction. We can probably find a better place
to do this, but for now we'll do it in snow's romstage main().
Change-Id: I86c7b6bc9e897a7a432c490fb96a126e81b8ce72
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2701
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/snow')
| -rw-r--r-- | src/mainboard/google/snow/romstage.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index c2f5fc9f0a..ea2feec782 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -52,6 +52,20 @@ static int board_wakeup_permitted(void) } #endif +/* + * Set/clear program flow prediction and return the previous state. + */ +static int config_branch_prediction(int set_cr_z) +{ + unsigned int cr; + + /* System Control Register: 11th bit Z Branch prediction enable */ + cr = get_cr(); + set_cr(set_cr_z ? cr | CR_Z : cr & ~CR_Z); + + return cr & CR_Z; +} + static void initialize_s5p_mshc(void) { /* MMC0: Fixed, 8 bit mode, connected with GPIO. */ @@ -81,6 +95,10 @@ void main(void) int ret; void *entry; + /* FIXME: if we boot from USB, we need to disable branch prediction + * before copying from USB into RAM */ + config_branch_prediction(1); + clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ /* Clock must be initialized before console_init, otherwise you may need |